| New architecture for high‐efficiency polymer photovoltaic cells using solution‐based titanium oxide as an optical spacer JY Kim, SH Kim, HH Lee, K Lee, W Ma, X Gong, AJ Heeger Advanced materials 18 (5), 572-576, 2006 | 1969 | 2006 |
| Test challenges for 3D integrated circuits HHS Lee, K Chakrabarty Design & Test of Computers, IEEE 26 (5), 26-35, 2009 | 409 | 2009 |
| An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth DH Woo, NH Seong, DL Lewis, HHS Lee High Performance Computer Architecture (HPCA), 2010 IEEE 16th International …, 2010 | 350 | 2010 |
| Extending Amdahl's law for energy-efficient computing in the many-core era DH Woo, HHS Lee Computer 41 (12), 24-31, 2008 | 313 | 2008 |
| Parasitic capacitance extraction for FinFETs CM Ho, KY Su, C Hsiao-Shu, YK Cheng, ZM Wu, HS Lee US Patent 8,826,213, 2014 | 290 | 2014 |
| Security refresh: Prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping NH Seong, DH Woo, HHS Lee ACM SIGARCH computer architecture news 38 (3), 383-394, 2010 | 290 | 2010 |
| Smart refresh: An enhanced memory controller design for reducing energy in conventional and 3D die-stacked DRAMs M Ghosh, HHS Lee 40th Annual IEEE/ACM international symposium on microarchitecture (MICRO …, 2007 | 277 | 2007 |
| Adaptive transaction scheduling for transactional memory systems RM Yoo, HHS Lee Proceedings of the twentieth annual symposium on Parallelism in algorithms …, 2008 | 250 | 2008 |
| SAFER: Stuck-at-fault error recovery for memories NH Seong, DH Woo, V Srinivasan, JA Rivers, HHS Lee Microarchitecture (MICRO), 2010 43rd Annual IEEE/ACM International Symposium …, 2010 | 217 | 2010 |
| 3D-MAPS: 3D massively parallel processor with stacked memory DH Kim, K Athikulwongse, M Healy, M Hossain, M Jung, I Khorosh, ... IEEE International Solid-State Circuits Conference, 188-190, 2012 | 214 | 2012 |
| 3D-MAPS: 3D Massively parallel processor with stacked memory DH Kim, K Athikulwongse, M Healy, M Hossain, M Jung, I Khorosh, ... IEEE International Solid-State Circuits Conference, 188-190, 2012 | 214 | 2012 |
| 3D-MAPS: 3D massively parallel processor with stacked memory DH Kim, K Athikulwongse, M Healy, M Hossain, M Jung, I Khorosh, ... IEEE International Solid-State Circuits Conference, 188-190, 2012 | 214 | 2012 |
| Eager writeback-a technique for improving bandwidth utilization HHS Lee, GS Tyson, MK Farrens Proceedings of the 33rd annual ACM/IEEE international symposium on …, 2000 | 158 | 2000 |
| High efficiency counter mode security architecture via prediction and precomputation W Shi, HS Lee, M Ghosh, C Lu, A Boldyreva 32nd International Symposium on Computer Architecture (ISCA'05), 14-24, 2005 | 150 | 2005 |
| High Efficiency Counter Mode Security Architecture via Prediction and Precomputation WSHHS Lee, M Ghosh, C Lu, A Boldyreva | 150* | |
| A scanisland based design enabling prebond testability in die-stacked microprocessors DL Lewis, HHS Lee Test Conference, 2007. ITC 2007. IEEE International, 1-8, 2007 | 146 | 2007 |
| Multiobjective microarchitectural floorplanning for 2-d and 3-d ICs M Healy, M Vittes, M Ekpanyapong, CS Ballapuram, SK Lim, HHS Lee, ... Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions …, 2007 | 127 | 2007 |
| The architectural implications of facebook's dnn-based personalized recommendation U Gupta, CJ Wu, X Wang, M Naumov, B Reagen, D Brooks, B Cottel, ... 2020 IEEE International Symposium on High Performance Computer Architecture …, 2020 | 124 | 2020 |
| Kicking the tires of software transactional memory: why the going gets tough RM Yoo, Y Ni, A Welc, B Saha, AR Adl-Tabatabai, HHS Lee Proceedings of the twentieth annual symposium on Parallelism in algorithms …, 2008 | 114 | 2008 |
| Region-based caching: an energy-delay efficient memory architecture for embedded processors HHS Lee, GS Tyson Proceedings of the 2000 international conference on Compilers, architecture …, 2000 | 111 | 2000 |
Dong Hyuk WooGoogleVerified email at google.com
