Matthew M. Ziegler
Matthew M. Ziegler
IBM T.J. Watson Research Center
Verified email at us.ibm.com - Homepage
Title
Cited by
Cited by
Year
Molecular electronics: From devices and interconnect to circuits and architecture
MR Stan, PD Franzon, SC Goldstein, JC Lach, MM Ziegler
Proceedings of the IEEE 91 (11), 1940-1957, 2003
3592003
CMOS/nano co-design for crossbar-based molecular electronic systems
MM Ziegler, MR Stan
IEEE Transactions on Nanotechnology 2 (4), 217-230, 2003
2382003
A sub-600-mV, fluctuation tolerant 65-nm CMOS SRAM array with dynamic cell biasing
AJ Bhavnagarwala, S Kosonocky, C Radens, Y Chan, K Stawiasz, ...
IEEE Journal of Solid-State Circuits 43 (4), 946-955, 2008
1362008
Design and analysis of crossbar circuits for molecular nanoelectronics
MM Ziegler, MR Stan
Proceedings of the 2nd IEEE Conference on Nanotechnology, 323-327, 2002
1172002
5.1 POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth
EJ Fluhr, J Friedrich, D Dreps, V Zyuban, G Still, C Gonzalez, A Hall, ...
2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014
1112014
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
B Fleischer, S Shukla, M Ziegler, J Silberman, J Oh, V Srinivasan, J Choi, ...
2018 IEEE Symposium on VLSI Circuits, 35-36, 2018
902018
Relative ordering circuit synthesis
M Cho, R Puri, H Ren, X Tang, H Xiang, MM Ziegler
US Patent 8,756,541, 2014
812014
Relative ordering circuit synthesis
M Cho, R Puri, H Ren, X Tang, H Xiang, MM Ziegler
US Patent 8,756,541, 2014
812014
Specifying circuit level connectivity during circuit design synthesis
MD Amundson, D Kucar, R Puri, CN Sze, MM Ziegler
US Patent 8,839,162, 2014
592014
Specifying circuit level connectivity during circuit design synthesis
MD Amundson, D Kucar, R Puri, CN Sze, MM Ziegler
US Patent 8,839,162, 2014
592014
A Case for CMOS/nano co-design
MR Stan, MM Ziegler
iccad, 348-352, 2002
53*2002
A case for CMOS/nano co-design
MM Ziegler, MR Stan
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002
532002
Converged large block and structured synthesis for high performance microprocessor designs
M Cho, VN Kravets, S Krishnaswamy, D Kucar, J Narasimhan, R Puri, ...
US Patent 8,271,920, 2012
492012
Converged large block and structured synthesis for high performance microprocessor designs
M Cho, VN Kravets, S Krishnaswamy, D Kucar, J Narasimhan, R Puri, ...
US Patent App. 12/868,086, 2012
492012
The CMOS/nano interface from a circuits perspective
MM Ziegler, MR Stan
Circuits and Systems, 2003. ISCAS'03. Proceedings of the 2003 International …, 2003
442003
4.1 22nm next-generation ibm system z microprocessor
J Warnock, B Curran, J Badar, G Fredeman, D Plass, Y Chan, S Carey, ...
Solid-State Circuits Conference-(ISSCC), 2015 IEEE International, 1-3, 2015
422015
Scalability simulations for nanomemory systems integrated on the molecular scale
MM Ziegler, CA Picconatto, JC Ellenbogen, A Dehon, D Wang, Z Zhong, ...
Annals of the New York Academy of Sciences 1006 (1), 312-330, 2003
392003
A unified design space for regular parallel prefix adders
MM Ziegler, MR Stan
Proceedings of the conference on Design, automation and test in Europe …, 2004
362004
Architectures and simulations for nanoprocessor systems integrated on the molecular scale
S Das, G Rose, MM Ziegler, CA Picconatto, JC Ellenbogen
Introducing Molecular Electronics, 479-512, 2006
302006
Large-signal two-terminal device model for nanoelectronic circuit analysis
GS Rose, MM Ziegler, MR Stan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (11 …, 2004
272004
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