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Eojin Lee
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Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology: Industrial Product
S Lee, S Kang, J Lee, H Kim, E Lee, S Seo, H Yoon, S Lee, K Lim, H Shin, ...
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021
1682021
TWiCe: Preventing Row-hammering by Exploiting Time Window Counters
E Lee, I Kang, S Lee, GE Suh, JH Ahn
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
1122019
Graphene: Strong yet Lightweight Row Hammer Protection
Y Park, W Kwon, E Lee, TJ Ham, JH Ahn, JW Lee
2020 53rd Annual IEEE/ACM International Symposium on Microarchitecture …, 2020
942020
TRiM: Enhancing Processor-Memory Interfaces with Scalable Tensor Reduction in Memory
J Park, B Kim, S Yun, E Lee, M Rhu, JH Ahn
MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021
492021
Accelerating Fully Homomorphic Encryption Through Architecture-Centric Analysis and Optimization
W Jung, E Lee, S Kim, J Kim, N Kim, K Lee, C Min, JH Cheon, JH Ahn
IEEE Access 9, 98772-98789, 2021
422021
CAT-TWO: Counter-Based Adaptive Tree, Time Window Optimized for DRAM Row-Hammer Prevention
I Kang, E Lee, JH Ahn
IEEE Access 8, 17366-17377, 2020
412020
GradPIM: A Practical Processing-in-DRAM Architecture for Gradient Descent
H Kim, H Park, T Kim, K Cho, E Lee, S Ryu, HJ Lee, K Choi, J Lee
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
342021
TWiCe: Time Window Counter Based Row Refresh to Prevent Row-Hammering
E Lee, S Lee, GE Suh, JH Ahn
IEEE Computer Architecture Letters 17 (1), 96-99, 2018
312018
MViD: Sparse Matrix-Vector Multiplication in Mobile DRAM for Accelerating Recurrent Neural Networks
B Kim, J Chung, E Lee, W Jung, S Lee, J Choi, J Park, M Wi, S Lee, ...
IEEE Transactions on Computers 69 (7), 955-967, 2020
272020
SHADOW: Preventing Row Hammer in DRAM with Intra-Subarray Row Shuffling
M Wi, J Park, S Ko, MJ Kim, NS Kim, E Lee, JH Ahn
2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023
252023
TRiM: Tensor Reduction in Memory
B Kim, J Park, E Lee, M Rhu, JH Ahn
IEEE Computer Architecture Letters 20 (1), 5-8, 2020
192020
MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework
DJ Oh, Y Moon, E Lee, TJ Ham, Y Park, JW Lee, JH Ahn
Proceedings of the 22nd ACM SIGPLAN/SIGBED International Conference on …, 2021
122021
An FPGA-based RNN-T Inference Accelerator with PIM-HBM
S Kang, S Lee, B Kim, H Kim, K Sohn, NS Kim, E Lee
Proceedings of the 2022 ACM/SIGDA International Symposium on Field …, 2022
92022
GraNDe: Near-Data Processing Architecture with Adaptive Matrix Mapping for Graph Convolutional Networks
S Yun, B Kim, J Park, H Nam, JH Ahn, E Lee
IEEE Computer Architecture Letters, 2022
72022
Evaluating the Impact of Optical Interconnects on a Multi-Chip Machine-Learning Architecture
Y Ro, E Lee, J Ahn
Electronics 7 (8), 130, 2018
62018
SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures
Y Ro, H Cho, E Lee, D Jung, YH Son, JH Ahn, JW Lee
2017 IEEE International Symposium on High Performance Computer Architecture …, 2017
62017
MaPHeA: A Framework for Lightweight Memory Hierarchy-Aware Profile-Guided Heap Allocation
DJ Oh, Y Moon, DK Ham, TJ Ham, Y Park, JW Lee, JH Ahn, E Lee
ACM Transactions on Embedded Computing Systems 22 (1), 1-28, 2022
52022
Semiconductor memory device employing processing in memory (PIM) and operation method of the semiconductor memory device
S Seo, B Kim, J Park, J Ahn, WI Minbok, S Lee, LEE Eojin, J Wonkyung, ...
US Patent 11,139,033, 2021
52021
Work as a team or individual: Characterizing the system-level impacts of main memory partitioning
E Lee, J Chung, D Jung, S Lee, S Li, JH Ahn
2017 IEEE International Symposium on Workload Characterization (IISWC), 156-166, 2017
42017
GraNDe: Efficient Near-Data Processing Architecture for Graph Neural Networks
S Yun, H Nam, J Park, B Kim, JH Ahn, E Lee
IEEE Transactions on Computers, 2023
32023
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