| Design and investigation of a novel charge plasma-based core-shell ring-TFET: analog and linearity analysis AK Gupta, A Raman, N Kumar IEEE Transactions on Electron Devices 66 (8), 3506-3512, 2019 | 55 | 2019 |
| Design and implementation of high-speed universal asynchronous receiver and transmitter (UART) AK Gupta, A Raman, N Kumar, R Ranjan 2020 7th International Conference on Signal Processing and Integrated …, 2020 | 37 | 2020 |
| Performance analysis of electrostatic plasma-based dopingless nanotube TFET AK Gupta, A Raman Applied Physics A 126, 1-10, 2020 | 21 | 2020 |
| Cylindrical nanowire-TFET with Core-Shell Channel architecture: design and investigation AK Gupta, A Raman, N Kumar Silicon 12, 2329-2336, 2020 | 14 | 2020 |
| Charge-plasma-based negative capacitance ring-FET: design, investigation and reliability analysis AK Gupta, A Raman, N Kumar Journal of Electronic Materials 49, 4852-4863, 2020 | 14 | 2020 |
| Electrostatic-doped nanotube TFET: proposal, design, and investigation with linearity analysis AK Gupta, A Raman Silicon 13, 2401-2413, 2021 | 11 | 2021 |
| Design, investigation, and sensitivity analysis of a biosensor based on an optimized electrostatically doped nanotube TFET AK Gupta, A Raman Journal of Electronic Materials 50, 5462-5471, 2021 | 4 | 2021 |
| Performance Tuning and Reliability Analysis of the Electrostatically Configured Nanotube Tunnel FET with Impact of Interface Trap Charges AK Gupta, A Raman, N Kumar Silicon 13, 4553-4564, 2021 | 2 | 2021 |
| Performance Enhancement and Signal Distortion Analysis of Virtually Doped Nanotube Tunnel FET with Embedded Ferroelectric Gate Oxide AK Gupta, A Raman Silicon, 1-12, 2021 | 1 | 2021 |
Naveen KumarUniversity of GlasgowПодтвержден адрес электронной почты в домене glasgow.ac.uk
