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| Germanium on Insulator and new 3D architectures opportunities for integration M Vinet, C Le Royer, P Batude, JF Damlencourt, JM Hartmann, L Hutin, ... International Journal of Nanotechnology 7 (4-8), 304-319, 2010 | 214 | 2010 |
| Gate-reflectometry dispersive readout and coherent control of a spin qubit in silicon A Crippa, R Ezzouch, A Aprá, A Amisse, R Lavieville, L Hutin, B Bertrand, ... Nature communications 10 (1), 2776, 2019 | 147 | 2019 |
| 3DVLSI with CoolCube process: An alternative path to scaling P Batude, C Fenouillet-Beranger, L Pasini, V Lu, F Deprat, L Brunet, ... 2015 Symposium on VLSI Technology (VLSI Technology), T48-T49, 2015 | 147 | 2015 |
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| Cryogenic subthreshold swing saturation in FD-SOI MOSFETs described with band broadening H Bohuslavskyi, AGM Jansen, S Barraud, V Barral, M Cassé, L Le Guevel, ... IEEE Electron Device Letters 40 (5), 784-787, 2019 | 122 | 2019 |
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| Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures A Beckers, F Jazaeri, H Bohuslavskyi, L Hutin, S De Franceschi, C Enz Solid-State Electronics 159, 106-115, 2019 | 102 | 2019 |
| 3D Sequential Integration: Application-driven technological achievements and guidelines P Batude, L Brunet, C Fenouillet-Beranger, F Andrieu, JP Colinge, ... 2017 IEEE International Electron Devices Meeting (IEDM), 3.1. 1-3.1. 4, 2017 | 87 | 2017 |
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| Spin readout of a CMOS quantum dot by gate reflectometry and spin-dependent tunneling VN Ciriano-Tejel, MA Fogarty, S Schaal, L Hutin, B Bertrand, L Ibberson, ... PRX Quantum 2 (1), 010353, 2021 | 63 | 2021 |
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| High performance 70 nm gate length germanium-on-insulator pMOSFET with high-k/metal gate K Romanjek, L Hutin, C Le Royer, A Pouydebasque, MA Jaud, C Tabone, ... Solid-state electronics 53 (7), 723-729, 2009 | 58 | 2009 |
