| Micro-pages: increasing DRAM efficiency with locality-aware data placement K Sudan, N Chatterjee, D Nellans, M Awasthi, R Balasubramonian, ... ACM SIGARCH Computer Architecture News 38 (1), 219-230, 2010 | 297 | 2010 |
| USIMM: the Utah SImulated Memory Module N Chatterjee, R Balasubramonian, M Shevgoor, SH Pugsley, AN Udipi, ... | 177 | 2012 |
| Handling the problems and opportunities posed by multiple on-chip memory controllers M Awasthi, DW Nellans, K Sudan, R Balasubramonian, A Davis Proceedings of the 19th international conference on Parallel architectures …, 2010 | 172 | 2010 |
| Performance Analysis of NVMe SSDs and their Implication on Real World Databases Q Xu, H Siyamwala, M Ghosh, T Suri, M Awasthi, Z Guz, A Shayesteh, ... SYSTOR, 2015 | 159 | 2015 |
| Efficient Scrub Mechanisms for Error-Prone Emerging Memories M Awasthi, M Shevgoor, K Sudan, B Rajendran, R Balasubramonian, ... HPCA, 2012 | 139 | 2012 |
| Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches M Awasthi, K Sudan, R Balasubramonian, J Carter High Performance Computer Architecture, 2009. HPCA 2009. IEEE 15th …, 2009 | 128 | 2009 |
| Understanding performance of I/O intensive containerized applications for NVMe SSDs J Bhimani, J Yang, Z Yang, N Mi, Q Xu, M Awasthi, R Pandurangan, ... Performance Computing and Communications Conference (IPCCC), 2016 IEEE 35th …, 2016 | 65 | 2016 |
| Data management scheme in virtualized hyperscale environments M Awasthi, R Brennan US Patent App. 14/729,026, 2016 | 57 | 2016 |
| Scalable and reliable communication for hardware transactional memory SH Pugsley, M Awasthi, N Madan, N Muralimanohar, R Balasubramonian Proceedings of the 17th international conference on Parallel architectures …, 2008 | 54 | 2008 |
| A Fresh Perspective on Total Cost of Ownership Models for Flash Storage in Datacenters Z Yang, M Awasthi, M Ghosh, N Mi Cloud Computing Technology and Science (CloudCom), 2016 IEEE International …, 2016 | 51 | 2016 |
| Docker Container Scheduler for I/O Intensive Applications running on NVMe SSDs J Bhimani, Z Yang, N Mi, J Yang, Q Xu, M Awasthi, R Pandurangan, ... IEEE Transactions on Multi-Scale Computing Systems, 2018 | 37 | 2018 |
| Prediction based dram row-buffer management in the many-core era M Awasthi, DW Nellans, R Balasubramonian, A Davis Parallel Architectures and Compilation Techniques (PACT), 2011 International …, 2011 | 37 | 2011 |
| Performance Analysis of Containerized Applications on Local and Remote Storage Q Xu, M Awasthi, KT Malladi, J Bhimani, J Yang, M Annavaram International Conference on Massive Storage Systems and Technology, MSST, 2017 | 28 | 2017 |
| Performance Characterization of Hyperscale Applications on NVMe SSDs Q Xu, H Siyamwala, M Ghosh, M Awasthi, T Suri, Z Guz, A Shayesteh, ... SIGMETRICS, 2015 | 23 | 2015 |
| Memory Device Having a Translation Layer with Multiple Associative Sectors Z Yang, S Hassani, M Awasthi US Patent 9,898,200, 2018 | 22 | 2018 |
| PREDICTOR-BASED MANAGEMENT OF DRAM ROW-BUFFERS DW Nellans, M Awasthi, R Balasubramonian, AL Davis US Patent 20,120,059,983, 2012 | 22 | 2012 |
| Memory Centric Characterization and Analysis of SPEC CPU2017 Suite S Singh, M Awasthi Proceedings of the 2019 ACM/SPEC International Conference on Performance …, 2019 | 21 | 2019 |
| Real-Time Analytics as the Killer Application for Processing-In-Memory Z Guz, M Awasthi, V Balakrishnan, M Ghosh, A Shayesteh, T Suri Workshop on Near Data Processing (WoNDP), 2014 | 16 | 2014 |
| Exploring the Design Space for 3D Clustered Architectures M Awasthi, R Balasubramonian Proceedings of the 3rd IBM Watson Conference on Interaction between …, 2006 | 16 | 2006 |
| System-Level Characterization of Datacenter Applications M Awasthi, T Suri, Z Guz, A Shayesteh, M Ghosh, V Balakrishnan International Conference on Performance Engineering, ICPE, 2015 | 15 | 2015 |
Rajeev BalasubramonianProfessor, School of Computing, University of UtahVerified email at cs.utah.edu
