Compact modeling and simulation of circuit reliability for 65-nm CMOS technology W Wang, V Reddy, AT Krishnan, R Vattikonda, S Krishnan, Y Cao
IEEE Transactions on Device and Materials Reliability 7 (4), 509-517, 2007
448 2007 A comprehensive framework for predictive modeling of negative bias temperature instability S Chakravarthi, A Krishnan, V Reddy, CF Machala, S Krishnan
2004 IEEE International Reliability Physics Symposium. Proceedings, 273-282, 2004
419 2004 Impact of negative bias temperature instability on digital circuit reliability V Reddy, AT Krishnan, A Marshall, J Rodriguez, S Natarajan, T Rost, ...
Microelectronics Reliability 45 (1), 31-38, 2005
378 2005 NBTI impact on transistor and circuit: models, mechanisms and scaling effects [MOSFETs] AT Krishnan, V Reddy, S Chakravarthi, J Rodriguez, S John, S Krishnan
IEEE international electron devices meeting 2003, 14.5. 1-14.5. 4, 2003
240 2003 Material dependence of hydrogen diffusion: Implications for NBTI degradation AT Krishnan, C Chancellor, S Chakravarthi, PE Nicollian, V Reddy, ...
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 4 …, 2005
213 2005 Comparison of E and 1/E TDDB models for SiO/sub 2/under long-term/low-field test conditions J McPherson, V Reddy, K Banerjee, H Le
International Electron Devices Meeting 1998. Technical Digest (Cat. No …, 1998
151 1998 Substrate triggering and salicide effects on ESD performance and protection circuit design in deep submicron CMOS processes A Amerasekera, C Duvvury, V Reddy, M Rodder
Proceedings of International Electron Devices Meeting, 547-550, 1995
124 1995 Negative bias temperature instability mechanism: The role of molecular hydrogen AT Krishnan, S Chakravarthi, P Nicollian, V Reddy, S Krishnan
Applied Physics Letters 88 (15), 153518, 2006
110 2006 Statistical prediction of circuit aging under process variations W Wang, V Reddy, B Yang, V Balakrishnan, S Krishnan, Y Cao
2008 IEEE Custom Integrated Circuits Conference, 13-16, 2008
104 2008 Impact of negative bias temperature instability on product parametric drift V Reddy, J Carulli, A Krishnan, W Bosch, B Burgess
2004 International Conferce on Test, 148-155, 2004
102 2004 Field-enhanced Si–Si bond-breakage mechanism for time-dependent dielectric breakdown in thin-film dielectrics JW McPherson, VK Reddy, HC Mogul
Applied physics letters 71 (8), 1101-1103, 1997
95 1997 off -State Degradation in Drain-Extended NMOS Transistors: Interface Damage and Correlation to Dielectric BreakdownD Varghese, H Kufluoglu, V Reddy, H Shichijo, D Mosher, S Krishnan, ...
IEEE Transactions on Electron Devices 54 (10), 2669-2678, 2007
81 2007 Circuit aging prediction for low-power operation R Zheng, J Velamala, V Reddy, V Balakrishnan, E Mintarno, S Mitra, ...
2009 IEEE Custom Integrated Circuits Conference, 427-430, 2009
61 2009 Impact of charging damage on negative bias temperature instability AT Krishnan, V Reddy, S Krishnan
International Electron Devices Meeting. Technical Digest (Cat. No. 01CH37224 …, 2001
57 2001 Latch-up in 65nm CMOS technology: a scaling perspective G Boselli, V Reddy, C Duvvury
2005 IEEE International Reliability Physics Symposium, 2005. Proceedings …, 2005
53 2005 SRAM cell static noise margin and VMIN sensitivity to transistor degradation AT Krishnan, V Reddy, D Aldrich, J Raval, K Christensen, J Rosal, ...
2006 International Electron Devices Meeting, 1-4, 2006
48 2006 Method for measuring NBTI degradation effects on integrated circuits TA Rost, V Reddy
US Patent 6,815,970, 2004
43 2004 A 1.2 V, sub-0.09/spl mu/m gate length CMOS technology M Mehrotra, JC Hu, A Jain, W Shiau, V Reddy, S Aur, M Rodder
International Electron Devices Meeting 1999. Technical Digest (Cat. No …, 1999
36 1999 An integrated modeling paradigm of circuit reliability for 65nm cmos technology W Wang, V Reddy, AT Krishnan, R Vattikonda, S Krishnan, Y Cao
2007 IEEE Custom Integrated Circuits Conference, 511-514, 2007
35 2007 EOS/ESD analysis of high-density logic chips S Ramaswamy, C Duvvuryt, A Amerasekerat, V Reddyt, SM Kang
EOS 6, 1, 1996
27 1996