Po-An Tsai
Po-An Tsai
Research Scientist, NVIDIA Research
Verified email at nvidia.com - Homepage
Title
Cited by
Cited by
Year
KPart: A hybrid cache partitioning-sharing technique for commodity multicores
N El-Sayed, A Mukkara, PA Tsai, H Kasture, X Ma, D Sanchez
2018 IEEE International Symposium on High Performance Computer Architecture …, 2018
702018
Jenga: Software-Defined Cache Hierarchies
PA Tsai, N Beckmann, D Sanchez
Proceedings of the 44th Annual International Symposium on Computer …, 2017
422017
Scaling distributed cache hierarchies through computation and data co-scheduling
N Beckmann, PA Tsai, D Sanchez
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
332015
Path-diversity-aware adaptive routing in network-on-chip systems
YH Kuo, PA Tsai, HP Ho, EJ Chang, HK Hsin, AY Wu
2012 IEEE 6th International Symposium on Embedded Multicore SoCs, 175-182, 2012
172012
Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies
PA Tsai, C Chen, D Sanchez
Proceedings of the 51st annual IEEE/ACM international symposium on …, 2018
132018
Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy
PA Tsai, D Sanchez
Proceedings of 2019 Architectural Support for Programming Languages and …, 2019
122019
Resource based virtual computing instance scheduling
PA TSAI, S Gamage, R GRIFFITH
US Patent App. 15/283,274, 2018
112018
Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems
PA Tsai, YH Kuo, EJ Chang, HK Hsin, AY Wu
2013 International Symposium onVLSI Design, Automation, and Test (VLSI-DAT), 1-4, 2013
102013
Nexus: A New Approach to Replication in Distributed Shared Caches
PA Tsai, N Beckmann, D Sanchez
Proceedings of the 26th international conference on Parallel Architectures …, 2017
92017
Rethinking the Memory Hierarchy for Modern Languages
PA Tsai, YL Gan, D Sanchez
Proceedings of the 51st annual IEEE/ACM international symposium on …, 2018
82018
Safecracker: Leaking Secrets through Compressed Caches
PA Tsai, A Sanchez, CW Fletcher, D Sanchez
Proceedings of 2020 Architectural Support for Programming Languages and …, 2020
52020
Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators
YN Wu, PA Tsai, A Parashar, V Sze, JS Emer
2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021
22021
Mind mappings: enabling efficient algorithm-accelerator mapping space search
K Hegde, PA Tsai, S Huang, V Chandra, A Parashar, CW Fletcher
Proceedings of the 26th ACM International Conference on Architectural …, 2021
12021
Leaking Secrets Through Compressed Caches
PA Tsai, A Sanchez, CW Fletcher, D Sanchez
IEEE Micro 41 (3), 27-33, 2021
2021
Jenga: Harnessing Heterogeneous Memories through Reconfigurable Cache Hierarchies
N Beckmann, PA Tsai, D Sanchez
2015
Hardware Abstractions for targeting EDDO Architectures with the Polyhedral Model
A Parashar, P Chatarasi, PA Tsai
Mind Mappings: Enabling Efficient Algorithm-Accelerator Mapping Space Search Extended Abstract
K Hegde, PA Tsai, S Huang, V Chandra, A Parashar, CW Fletcher
Searchable encryption
A Backurs, D Grier, A Sealfon, PA Tsai
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Articles 1–18