Simone Casale-Brunet
Simone Casale-Brunet
Verified email at epfl.ch - Homepage
Title
Cited by
Cited by
Year
Methods to explore design space for MPEG RMC codec specifications
S Casale-Brunet, A Elguindy, E Bezati, R Thavot, G Roquier, M Mattavelli, ...
Signal Processing: Image Communication 28 (10), 1278-1294, 2013
522013
TURNUS: a design exploration framework for dataflow system design
S Casale-Brunet, M Mattavelli, JW Janneck
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, 654-654, 2013
35*2013
Synthesis and optimization of high-level stream programs
E Bezati, S Casale-Brunet, M Mattavelli, JW Janneck
Electronic System Level Synthesis Conference (ESLsyn), 2013, 1-6, 2013
302013
Turnus: a unified dataflow design space exploration framework for heterogeneous parallel systems
S Casale-Brunet, C Alberti, M Mattavelli, JW Janneck
2013 Conference on Design and Architectures for Signal and Image Processing …, 2013
272013
Analysis and optimization of dynamic dataflow programs
S Casale-Brunet
École Polytechnique Fédérale de Lausanne, 2015
252015
Buffer optimization based on critical path analysis of a dataflow program design
S Casale-Brunet, M Mattavelli, JW Janneck
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on, 1384-1387, 2013
25*2013
Partitioning and optimization of high level stream applications for multi clock domain architectures
S Casale-Brunet, E Bezati, C Alberti, M Mattavelli, E Amaldi, JW Janneck
Signal Processing Systems (SiPS), 2013 IEEE Workshop on, 177-182, 2013
23*2013
Profiling of dataflow programs using post mortem causation traces
S Casale-Brunet, M Mattavelli, JW Janneck
Signal Processing Systems (SiPS), 2012 IEEE Workshop on, 220-225, 2012
23*2012
Automated Design Flow for Multi-Functional Dataflow-Based Platforms
C Sau, P Meloni, L Raffo, F Palumbo, E Bezati, S Casale-Brunet, ...
Journal of Signal Processing Systems, 1-23, 2015
212015
Clock-gating of streaming applications for energy efficient implementations on FPGAs
E Bezati, SC Brunet, M Mattavelli, JW Janneck
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2016
202016
Coarse grain clock gating of streaming applications in programmable logic implementations
E Bezati, S Casale-Brunet, M Mattavelli, JW Janneck
Electronic System Level Synthesis Conference (ESLsyn), Proceedings of the …, 2014
202014
Design space exploration strategies for FPGA implementation of signal processing systems using CAL dataflow program
AAH Ab Rahman, R Thavot, S Casale-Brunet, E Bezati, M Mattavelli
Design and Architectures for Signal and Image Processing (DASIP), 2012 …, 2012
192012
A Lego Mindstorms NXT experiment for model predictive control education
M Canale, S Casale-Brunet
Proceedings of the European Control Conference, Zurich, Switzerland, 2549-2554, 2013
182013
A multidisciplinary approach for Model Predictive Control Education: A LEGO Mindstorms NXT-based framework
M Canale, S Casale-Brunet
International Journal of Control, Automation and Systems 12 (5), 1030-1039, 2014
162014
Automated design flow for coarse-grained reconfigurable platforms: An RVC-CAL multi-standard decoder use-case
C Sau, L Raffo, F Palumbo, E Bezati, S Casale-Brunet, M Mattavelli
2014 International Conference on Embedded Computer Systems: Architectures …, 2014
142014
Analysis and optimization of dynamic dataflow programs
SC Brunet
Diss. ÉCOLE POLYTECHNIQUE FÉDÉRALE DE LAUSANNE, 2015
102015
TURNUS: An open-source design space exploration framework for dynamic stream programs
S Casale-Brunet, M Wiszniewska, E Bezati, M Mattavelli, JW Janneck, ...
Proceedings of the 2014 Conference on Design and Architectures for Signal …, 2014
102014
High-level synthesis of dynamic dataflow programs on heterogeneous MPSoC platforms
E Bezati, S Casale-Brunet, M Mattavelli, JW Janneck
2016 International conference on embedded computer systems: Architectures …, 2016
92016
Dataflow Programs Analysis and Optimization Using Model Predictive Control Techniques
M Canale, S Casale-Brunet, E Bezati, M Mattavelli, J Janneck
Journal of Signal Processing Systems, 1-11, 0
9
High-precision performance estimation for the design space exploration of dynamic dataflow programs
M Michalska, S Casale-Brunet, E Bezati, M Mattavelli
IEEE Transactions on Multi-Scale Computing Systems 4 (2), 127-140, 2017
82017
The system can't perform the operation now. Try again later.
Articles 1–20