Finn: A framework for fast, scalable binarized neural network inference Y Umuroglu, NJ Fraser, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017 | 1195 | 2017 |
FINN-R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks M Blott, TB Preußer, NJ Fraser, G Gambardella, K O’brien, Y Umuroglu, ... ACM Transactions on Reconfigurable Technology and Systems (TRETS) 11 (3), 16, 2018 | 390 | 2018 |
FINN-L: Library Extensions and Design Trade-off Analysis for Variable Precision LSTM Networks on FPGAs V Rybalkin, A Pappalardo, MM Ghaffar, G Gambardella, N Wehn, M Blott 2018 28th International Conference on Field Programmable Logic and …, 2018 | 87 | 2018 |
Scaling binarized neural networks on reconfigurable logic NJ Fraser, Y Umuroglu, G Gambardella, M Blott, P Leong, M Jahre, ... Proceedings of the 8th Workshop and 6th Workshop on Parallel Programming and …, 2017 | 73 | 2017 |
Inference of quantized neural networks on heterogeneous all-programmable devices TB Preußer, G Gambardella, N Fraser, M Blott 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 833-838, 2018 | 53 | 2018 |
An area-efficient 2-D convolution implementation on FPGA for space applications S Di Carlo, G Gambardella, M Indaco, D Rolfo, G Tiotto, P Prinetto Design and Test Workshop (IDT), 2011 IEEE 6th International, 88-92, 2011 | 50 | 2011 |
A cloud-based Cyber-Physical System for environmental monitoring T Sanislav, G Mois, S Folea, L Miclea, G Gambardella, P Prinetto 2014 3rd Mediterranean Conference on Embedded Computing (MECO), 6-9, 2014 | 43 | 2014 |
Efficient Error-Tolerant Quantized Neural Network Accelerators G Gambardella, J Kappauf, M Blott, C Doehring, M Kumm, P Zipf, ... 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2019 | 42 | 2019 |
A software-based self test of CUDA Fermi GPUs S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ... Test Symposium (ETS), 2013 18th IEEE European, 1-6, 2013 | 42 | 2013 |
FAT: Training Neural Networks for Reliable Inference Under Hardware Faults U Zahid, G Gambardella, NJ Fraser, M Blott, K Vissers 2020 IEEE International Test Conference (ITC), 1-10, 2020 | 31 | 2020 |
Accuracy to Throughput Trade-Offs for Reduced Precision Neural Networks on Reconfigurable Logic J Su, NJ Fraser, G Gambardella, M Blott, G Durelli, DB Thomas, ... Applied Reconfigurable Computing. Architectures, Tools, and Applications …, 2018 | 29 | 2018 |
Customizing low-precision deep neural networks for FPGAs J Faraone, G Gambardella, D Boland, N Fraser, M Blott, PHW Leong 2018 28th International Conference on Field Programmable Logic and …, 2018 | 26 | 2018 |
A novel methodology to increase fault tolerance in autonomous FPGA-based systems S Di Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta, A Vallero 2014 IEEE 20th International On-Line Testing Symposium (IOLTS), 87-92, 2014 | 22 | 2014 |
Evaluation of optimized cnns on heterogeneous accelerators using a novel benchmarking approach M Blott, NJ Fraser, G Gambardella, L Halder, J Kath, Z Neveu, ... IEEE Transactions on Computers 70 (10), 1654-1669, 2020 | 20 | 2020 |
Fault mitigation strategies for CUDA GPUs S Di Carlo, G Gambardella, I Martella, P Prinetto, D Rolfo, P Trotta 2013 IEEE International Test Conference (ITC), 1-8, 2013 | 20 | 2013 |
Compressing low precision deep neural networks using sparsity-induced regularization in ternary networks J Faraone, N Fraser, G Gambardella, M Blott, PHW Leong Neural Information Processing: 24th International Conference, ICONIP 2017 …, 2017 | 17 | 2017 |
SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs SD Carlo, G Gambardella, P Prinetto, D Rolfo, P Trotta ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (1), 1, 2015 | 13 | 2015 |
Increasing the robustness of CUDA Fermi GPU-based systems S Di Carlo, G Gambardella, M Indaco, I Martella, P Prinetto, D Rolfo, ... 2013 IEEE 19th International On-Line Testing Symposium (IOLTS), 234-235, 2013 | 11 | 2013 |
Scaling Neural Network Performance through Customized Hardware Architectures on Reconfigurable Logic M Blott, TB Preußer, N Fraser, G Gambardella, K O'Brien, Y Umuroglu, ... Computer Design (ICCD), 2017 IEEE International Conference on, 419-422, 2017 | 10 | 2017 |
Radiation-Tolerant Deep Learning Processor Unit (DPU)-Based Platform Using Xilinx 20-nm Kintex UltraScale FPGA P Maillard, YP Chen, J Vidmar, N Fraser, G Gambardella, M Sawant, ... IEEE Transactions on Nuclear Science 70 (4), 714-721, 2022 | 9 | 2022 |