| Building PUF based authentication and key exchange protocol for IoT without explicit CRPs in verifier database U Chatterjee, V Govindan, R Sadhukhan, D Mukhopadhyay, ... IEEE transactions on dependable and secure computing 16 (3), 424-437, 2018 | 241 | 2018 |
| A hardware trojan attack on FPGA-based cryptographic key generation: impact and detection V Govindan, RS Chakraborty, P Santikellur, AK Chaudhary Journal of Hardware and Systems Security 2, 225-239, 2018 | 16 | 2018 |
| PUFSSL: an OpenSSL extension for PUF based authentication U Chatterjee, R Sadhukhan, V Govindan, D Mukhopadhyay, ... 2018 IEEE 23rd International Conference on Digital Signal Processing (DSP), 1-5, 2018 | 12 | 2018 |
| SmashClean: A hardware level mitigation to stack smashing attacks in OpenRISC M Alam, DB Roy, S Bhattacharya, V Govindan, RS Chakraborty, ... 2016 ACM/IEEE International Conference on Formal Methods and Models for …, 2016 | 11 | 2016 |
| PUF+ IBE: blending physically unclonable functions with identity based encryption for authentication and key exchange in IoTs U Chatterjee, V Govindan, R Sadhukhan, D Mukhopadhyay, ... Cryptology ePrint Archive, 2017 | 9 | 2017 |
| Logic testing for hardware trojan detection V Govindan, RS Chakraborty The Hardware Trojan War: Attacks, Myths, and Defenses, 149-182, 2018 | 8 | 2018 |
| Customized instructions for protection against memory integrity attacks DB Roy, M Alam, S Bhattacharya, V Govindan, F Regazzoni, ... IEEE Embedded Systems Letters 10 (3), 91-94, 2018 | 6 | 2018 |
| Probabilistic hardware trojan attacks on multiple layers of reconfigurable network infrastructure R Mukherjee, V Govindan, S Koteshwara, A Das, KK Parhi, ... Journal of Hardware and Systems Security 4, 343-360, 2020 | 4 | 2020 |
| ProTro: a probabilistic counter based hardware trojan attack on FPGA based MACSec enabled ethernet switch V Govindan, S Koteshwara, A Das, KK Parhi, RS Chakraborty Security, Privacy, and Applied Cryptography Engineering: 9th International …, 2019 | 4 | 2019 |
| United we stand: A threshold signature scheme for identifying outliers in PLCs U Chatterjee, P Santikellur, R Sadhukhan, V Govindan, D Mukhopadhyay, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-2, 2019 | 3 | 2019 |
Rajat Subhra ChakrabortyProfessor, Dept. of Computer Science and Engineering, IIT Kharagpur, India - 721302Verified email at cse.iitkgp.ac.in
