| Embedded Web Server on Nios II Embedded FPGA Platform NN Joshi, PK Dakhole, PP Zode IEEE, 2009 | 26 | 2009 |
| Parallel prefix han-carlson adder SK Gedam, PP Zode International Journal of Research in Engineering and Applied Sciences 2 (2 …, 2014 | 16 | 2014 |
| FPGA based novel true random number generator using LFSR with dynamic seed P Zode, P Zode, R Deshmukh 2019 IEEE 16th India Council International Conference (INDICON), 1-3, 2019 | 13 | 2019 |
| Implementation of number recognition using adaptive template matching and feature extraction method KS Machhale, PP Zode, PP Zode 2012 International Conference on Communication Systems and Network …, 2012 | 11 | 2012 |
| Fast architecture of modular inversion using Itoh-Tsujii algorithm P Zode, RB Deshmukh, A Samad VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee …, 2017 | 10 | 2017 |
| Design of bulk driven miller Operational Transconductance Amplifier K Bhange, P Zode, P Zode 2015 International Conference on Industrial Instrumentation and Control …, 2015 | 9 | 2015 |
| FPGA implementation of hybrid Han-Carlson adder S Gedam, P Zode, P Zode 2014 2nd International Conference on Devices, Circuits and Systems (ICDCS), 1-4, 2014 | 9 | 2014 |
| A secure architecture for the design for testability structures SD Talatule, P Zode, P Zode 2015 19th International Symposium on VLSI Design and Test, 1-6, 2015 | 5 | 2015 |
| Fast Modular Multiplication using Parallel Prefix Adder PP Zode, RB Deshmukh | 5 | 2014 |
| Optimization of elliptic curve scalar multiplication using constraint based scheduling P Zode, R Deshmukh Journal of Parallel and Distributed Computing 167, 232-239, 2022 | 4 | 2022 |
| Efficient design 2k−1 binary to residue converter R Shende, P Zode, P Zode 2012 International Conference on Devices, Circuits and Systems (ICDCS), 482-485, 2012 | 4 | 2012 |
| Novel fault attack resistant architecture for elliptic curve cryptography P Zode, R Deshmukh Microprocessors and Microsystems 84, 104049, 2021 | 3 | 2021 |
| Side channel attack resistant architecture for elliptic curve cryptography P Zode, RB Deshmukh 2015 19th International Symposium on VLSI Design and Test, 1-2, 2015 | 3 | 2015 |
| Novel fault attack resistant Elliptic Curve processor architecture PP Zode, RB Deshmukh 2014 Annual IEEE India Conference (INDICON), 1-6, 2014 | 2 | 2014 |
| Performance analysis of Montgomery multiplier for public key cryptosystem S Kakde, G Somulu, P Zode 2013 Fourth International Conference on Computing, Communications and …, 2013 | 2 | 2013 |
| Test Pattern Generation Using Recursive Pseudo Exhaustive Method for Wallace Tree Multiplier P Zode, P Zode, R Deshmukh 2018 15th IEEE India Council International Conference (INDICON), 1-4, 2018 | 1 | 2018 |
| Side channel attack resistant architecture for elliptic curve cryptosystem P Zode, R Deshmukh Cyber-Physical Systems 4 (4), 205-215, 2018 | 1 | 2018 |
| MOS switch-based DPA-resistant GF(28) modulo multiplier P Zode, R Deshmukh International Journal of Electronics Letters 6 (2), 231-241, 2018 | 1 | 2018 |
| Design and Implementation of high speed Parallel Prefix Ling Adder P Jadhav, PP Zode ISSN (PRINT), 2320-8945, 2013 | 1 | 2013 |
| Design of Optimized Modular Multiplier Using Montgomery Algorithm for RSA Cryptosystem S Kakde, P Zode, P Zode Proceedings of the Third International Conference on Trends in Information …, 2013 | | 2013 |
Raghavendra DeshmukhProfessor VNIT NagpurVerified email at ece.vnit.ac.in
