| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 248 | 2020 |
| Efficient metadata management for irregular data prefetching H Wu, K Nathella, D Sunwoo, A Jain, C Lin Proceedings of the 46th International Symposium on Computer Architecture …, 2019 | 49 | 2019 |
| Temporal prefetching without the off-chip metadata H Wu, K Nathella, J Pusdesris, D Sunwoo, A Jain, C Lin Proceedings of the 52nd Annual IEEE/ACM International Symposium on …, 2019 | 39 | 2019 |
| Re-establishing fetch-directed instruction prefetching: An industry perspective Y Ishii, J Lee, K Nathella, D Sunwoo 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021 | 25 | 2021 |
| Rebasing instruction prefetching: An industry perspective Y Ishii, J Lee, K Nathella, D Sunwoo IEEE Computer Architecture Letters 19 (2), 147-150, 2020 | 19 | 2020 |
| Info Hide–A Cluster Cover Approach R Amirtharajan, K Nathella, J Harish International Journal of Computer Applications 3 (5), 11-18, 2010 | 15 | 2010 |
| The gem5 simulator: Version 20.0+. CoRR abs/2007.03152 (2020) J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 11 | 2020 |
| Whisper: Profile-guided branch misprediction elimination for data center applications TA Khan, M Ugur, K Nathella, D Sunwoo, H Litz, DA Jiménez, B Kasikci 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO), 19-34, 2022 | 10 | 2022 |
| Cryo-computing for infrastructure applications: A technology-to-microarchitecture co-optimization study D Prasad, M Vangala, M Bhargava, A Beckers, A Grill, D Tierno, ... 2022 International Electron Devices Meeting (IEDM), 23.5. 1-23.5. 4, 2022 | 9 | 2022 |
| Hardware resource configuration for processing system D Sunwoo, S Jeloka, SP Sinha, J Lee, JA Joao, K Nathella US Patent App. 16/943,117, 2022 | 6 | 2022 |
| Practical temporal prefetching with compressed on-chip metadata H Wu, K Nathella, M Pabst, D Sunwoo, A Jain, C Lin IEEE Transactions on Computers 71 (11), 2858-2871, 2021 | 2 | 2021 |
| Range prefetch instruction K Nathella, DH Mansell, AR Carro, A Mundy US Patent 11,797,307, 2023 | 1 | 2023 |
| Prefetch mechanism for a cache structure CAI Lingzhe, K Nathella, J Lee, D Sunwoo US Patent 11,526,356, 2022 | 1 | 2022 |
| Systems, Devices, and Methods of Cache Memory DMS Prasad, K Nathella, DV Pietromonaco US Patent App. 17/866,448, 2024 | | 2024 |
| Vectorized Operations for Sparse Kernels J Randall, JG Beu, K Nathella, TQ Ta US Patent App. 17/743,705, 2023 | | 2023 |
| A Characterization of the Effects of Software Instruction Prefetching on an Aggressive Front-end G Chacon, N Gober, K Nathella, PV Gratz, DA Jiménez 2023 IEEE International Symposium on Performance Analysis of Systems and …, 2023 | | 2023 |
| Flushing a fetch queue using predecode circuitry and prediction information J Lee, Y Ishii, K Nathella, D Sunwoo US Patent 11,599,361, 2023 | | 2023 |
| Fetch queues using control flow prediction J Lee, Y Ishii, K Nathella, D Sunwoo US Patent App. 17/315,737, 2022 | | 2022 |
| Prefetching techniques K Nathella, C Abernathy, HM Sanjeliwala, D Sunwoo, B Vijayan US Patent 10,817,426, 2020 | | 2020 |
| Multiple stride prefetching JM Pusdesris, MR Dooley, AC Shulyak, K Nathella, D Sunwoo US Patent 10,769,070, 2020 | | 2020 |
Dam SunwooSenior Principal Research Engineer, Arm ResearchVerified email at arm.com
