Kanchan Baran Maji
Kanchan Baran Maji
Research scholar,NIT Durgapur
Подтвержден адрес электронной почты в домене phd.nitdgp.ac.in
Название
Процитировано
Процитировано
Год
An evolutionary approach based design automation of low power CMOS Two-Stage Comparator and Folded Cascode OTA
KB Maji, R Kar, D Mandal, SP Ghoshal
AEU-International Journal of Electronics and Communications 70 (4), 398-408, 2016
122016
Design of optimal CMOS analog amplifier circuits using a hybrid evolutionary optimization technique
BP De, KB Maji, R Kar, D Mandal, SP Ghoshal
Journal of Circuits, Systems and Computers 27 (02), 1850029, 2018
112018
Butterworth filter design using seeker optimization algorithm
KB Maji, US Sree, R Kar, D Mandal, SP Ghoshal
2015 International Conference on Science and Technology (TICST), 298-302, 2015
92015
Optimal design of low power high gain and high speed CMOS circuits using fish swarm optimization algorithm
KB Maji, R Kar, D Mandal, SP Ghoshal
International Journal of Machine Learning and Cybernetics 9 (5), 771-786, 2018
62018
Application of improved PSO for optimal design of CMOS two-stage op-amp using nulling resistor compensation circuit
BP De, KB Maji, R Kar, D Mandal, SP Ghoshal
2017 Devices for Integrated Circuit (DevIC), 110-115, 2017
62017
An evolutionary algorithm based approach for VLSI floor-planning
KB Maji, A Ghosh, R Kar, D Mandal, SP Ghoshal
2015 International Conference on Science and Technology (TICST), 248-253, 2015
52015
Low frequency ring oscillator and its use in non overlapping clock generation
R Todani, AK Mal, KB Maji
International Journal of Engineering and Technology 4 (6), 781, 2012
42012
Design of low-voltage cmos op-amp using evolutionary optimization techniques
KB Maji, R Kar, D Mandal, B Prasanthi, SP Ghoshal
Advances in computer communication and computational sciences, 257-267, 2019
32019
Optimal Design of Low-Voltage, Two-Stage CMOS Op-amp Using Evolutionary Techniques
BP De, KB Maji, B Bag, S Tripathi, R Kar, D Mandal, SP Ghoshal
Communication, Devices, and Computing, 303-315, 2017
32017
CMOS analog amplifier circuits design using seeker optimization algorithm
KB Maji, BP De, R Kar, D Mandal, SP Ghoshal
IETE Journal of Research, 1-10, 2019
22019
Evolutionary computation based sizing technique of nulling resistor compensation based cmos two-stage op-amp circuit
BP De, KB Maji, R Kar, D Mandal, SP Ghoshal
International Journal of High Speed Electronics and Systems 26 (04), 1740021, 2017
22017
Optimal design of low power three-stage CMOS operational amplifier using Simplex-PSO algorithm
KB Maji, R Kar, D Mandal, SP Ghoshal
2016 IEEE Region 10 Conference (TENCON), 138-141, 2016
22016
Opposition Harmony Search algorithm based optimal sizing of CMOS analog amplifier circuit
KB Maji, H Jaiswal, R Kar, D Mandal, SP Ghoshal
2015 International Conference on Science and Technology (TICST), 303-307, 2015
22015
Optimal Design of Ultra-Low-Power 2.4 GHz LNA for IEEE 802.15. 4/Bluetooth Applications
S Ghosh, BP De, KB Maji, R Kar, D Mandal, AK Mal
Journal of Circuits, Systems and Computers 29 (16), 2050261, 2020
12020
Optimization of Electrical Parameters for the Gate Stack Double Gate (GSDG) MOSFET using Simplex-PSO Algorithm
D Chowdhury, BP De, KB Maji, S Ghosh, R Kar, D Mandal
2019 Devices for Integrated Circuit (DevIC), 334-336, 2019
12019
Optimal Design of Low Voltage CMOS Second Generation Current Conveyor Using Hybrid Cuckoo Search and Particle Swarm Optimization Algorithm
KB Maji, R Kar, D Mandal, SP Ghoshal
2017 International Conference on Information Technology (ICIT), 246-251, 2017
12017
Application of PSO variants for optimal design of two-stage CMOS Op-amp with robust bias circuit
BP De, KB Maji, D Chowdhury, R Kar, D Mandal, SP Ghoshal
Communication, Devices, and Computing, 263-272, 2017
12017
An evolutionary algorithm based approach for optimal design of low power CMOS two-stage comparator
KB Maji, S Choudhury, R Kar, D Mandal, SP Ghoshal
2015 International Conference on Science and Technology (TICST), 260-266, 2015
12015
An Evolutionary Approach Based Optimization of Small Signal Parameters for GSDG MOSFET
D Chowdhury, BP De, KB Maji, R Kar, D Mandal
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS), 146-149, 2020
2020
Optimization of Subthreshold Parameters for Graded Channel Gate Stack Double Gate (GCGSDG) MOSFET Using Craziness-Based Particle Swarm Optimization Algorithm
D Chowdhury, BP De, KB Maji, S Ghosh, R Kar, D Mandal, S Bhunia
Proceedings of the 2nd International Conference on Communication, Devices …, 2020
2020
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Статьи 1–20