| A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths S Das, K Madhu, M Krishna, N Sivanandan, F Merchant, S Natarajan, ... Journal of Systems Architecture 60 (7), 592-614, 2014 | 21 | 2014 |
| SIMAAH: RTL simulation accelerator for complex SoC's IB Mahapatra, S Natarajan, S Nalesh, SK Nandy 2015 IEEE International Conference on Electronics, Computing and …, 2015 | 6 | 2015 |
| DFG partitioning algorithms for coarse grained reconfigurable array assisted RTL simulation accelerators IB Mahapatra, U Agarwal, SK Nandy 2018 IEEE International Conference on Electronics, Computing and …, 2018 | 5 | 2018 |
| Design Space Exploration of an Execution-Driven Functional Simulation Methodology IB Mahapatra, U Agarwal, C Azad, SK Nandy 2018 31st International Conference on VLSI Design and 2018 17th …, 2018 | 4 | 2018 |
| A Novel Algorithm-Architecture Co-Designed System for Dynamic Execution-Driven Pre-Silicon Verification IB Mahapatra | | 2021 |
| EX-DRIVE: An Execution Driven Functional Verification Flow IB Mahapatra, SK Nandy Journal of Low Power Electronics 15 (2), 2019 | | 2019 |
| An Algorithm-Architecture Co-Designed System for Dynamic Execution-Driven Pre-Silicon Verification IB Mahapatra, SK Nandy 2018 8th International Symposium on Embedded Computing and System Design …, 2018 | | 2018 |
