Joonas Multanen
Joonas Multanen
Doctoral student, Tampere University
Verified email at - Homepage
Cited by
Cited by
SHRIMP: Efficient instruction delivery with domain wall memory
J Multanen, P Jääskeläinen, AA Khan, F Hameed, J Castrillon
2019 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2019
LordCore: Energy-efficient OpenCL-programmable software-defined radio coprocessor
H Kultala, T Viitanen, H Berg, P Jääskeläinen, J Multanen, M Kokkonen, ...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (5 …, 2019
LoTTA: Energy-Efficient Processor for Always-on Applications
J Multanen, H Kultala, P Jääskeläinen, T Viitanen, A Tervo, J Takala
Foveated instant preview for progressive rendering
M Koskela, K Immonen, T Viitanen, P Jääskeläinen, J Multanen, J Takala
SIGGRAPH Asia 2017 Technical Briefs, 1-4, 2017
Impact of operand sharing to the processor energy efficiency
H Kultala, J Multanen, P Jääskeläinen, T Viitanen, J Takala
2015 18th CSI International Symposium on Computer Architecture and Digital …, 2015
Energy-Delay Trade-offs in Instruction Register File Design
J Multanen, H Kultala, P Jääskeläinen
Instantaneous foveated preview for progressive Monte Carlo rendering
MK Koskela, KV Immonen, TT Viitanen, PO Jääskeläinen, JI Multanen, ...
Computational Visual Media 4 (3), 3, 2018
Power optimizations for transport triggered SIMD processors
J Multanen, T Viitanen, H Linjamäki, H Kultala, P Jääskeläinen, J Takala, ...
Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS …, 2015
System Simulation of Memristor Based Computation in Memory Platforms
A BanaGozar, K Vadivel, J Multanen, P Jääskeläinen, S Stuijk, ...
International Conference on Embedded Computer Systems, 152-168, 2020
Customized high performance low power processor for binaural speaker localization
N Behmann, C Seifert, G Paya-Vaya, H Blume, P Jääskeläinen, ...
2016 IEEE International Conference on Electronics, Circuits and Systems …, 2016
Opencl programmable exposed datapath high performance low-power image signal processor
J Multanen, H Kultala, M Koskela, T Viitanen, P Jääskelainen, J Takala, ...
2016 IEEE Nordic Circuits and Systems Conference (NORCAS), 1-6, 2016
Xor-masking: a novel statistical method for instruction read energy reduction in contemporary SRAM technologies
J Multanen, T Viitanen, P Jääskeläinen, J Takala
2016 IEEE International Workshop on Signal Processing Systems (SiPS), 63-68, 2016
Hardware optimizations for low-power processors
J Multanen
Programmable Dictionary Code Compression for Instruction Stream Energy Efficiency
J Multanen, K Hepola, P Jääskeläinen
2020 IEEE 38th International Conference on Computer Design (ICCD), 356-363, 2020
Energy Efficient Low Latency Multi-issue Cores for Intelligent Always-On IoT Applications
J Multanen, H Kultala, K Tervo, P Jääskeläinen
Journal of Signal Processing Systems 92 (10), 1057-1073, 2020
Instruction Fetch Energy Reduction with Biased SRAMs
J Multanen, T Viitanen, P Jääskeläinen, J Takala
Journal of Signal Processing Systems, 1-14, 2018
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