| NUAT: A non-uniform access time memory controller W Shin, J Yang, J Choi, LS Kim 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 86 | 2014 |
| Multiple clone row DRAM: A low latency and area optimized DRAM J Choi, W Shin, J Jang, J Suh, Y Kwon, Y Moon, LS Kim ACM SIGARCH Computer Architecture News 43 (3S), 223-234, 2015 | 65 | 2015 |
| Energy efficient data encoding in DRAM channels exploiting data value similarity H Seol, W Shin, J Jang, J Choi, J Suh, LS Kim ACM SIGARCH Computer Architecture News 44 (3), 719-730, 2016 | 40 | 2016 |
| All-digital hybrid temperature sensor network for dense thermal monitoring S Paek, W Shin, J Lee, HE Kim, JS Park, LS Kim 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 19 | 2013 |
| DRAM-latency optimization inspired by relationship between row-access time and refresh timing W Shin, J Choi, J Jang, J Suh, Y Moon, Y Kwon, LS Kim IEEE Transactions on Computers 65 (10), 3027-3040, 2015 | 18 | 2015 |
| Hybrid temperature sensor network for area-efficient on-chip thermal map sensing S Paek, W Shin, J Lee, HE Kim, JS Park, LS Kim IEEE Journal of Solid-State Circuits 50 (2), 610-618, 2015 | 14 | 2015 |
| Q-DRAM: Quick-access DRAM with decoupled restoring from row-activation W Shin, J Choi, J Jang, J Suh, Y Kwon, Y Moon, H Kim, LS Kim IEEE Transactions on Computers 65 (7), 2213-2227, 2015 | 11 | 2015 |
| Sparse-insertion write cache to mitigate write disturbance errors in phase change memory J Jang, W Shin, JW Choi, Y Kim, LS Kim IEEE Transactions on Computers 68 (5), 752-764, 2018 | 9 | 2018 |
| Elaborate refresh: a fine granularity retention management for deep submicron DRAMs H Seol, W Shin, J Jang, J Choi, H Lee, LS Kim IEEE Transactions on Computers 67 (10), 1403-1415, 2018 | 8 | 2018 |
| PowerField: A probabilistic approach for temperature-to-power conversion based on Markov random field theory S Paek, W Shin, J Sim, LS Kim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013 | 8 | 2013 |
| An even/odd error detection based low-complexity chase decoding for low-latency RS decoder design J Jeong, D Shin, W Shin, J Park IEEE Communications Letters 25 (5), 1505-1509, 2021 | 6 | 2021 |
| In-dram data initialization H Seol, W Shin, J Jang, J Choi, J Suh, LS Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (11 …, 2017 | 6 | 2017 |
| Refresh-aware write recovery memory controller J Jang, W Shin, J Choi, J Suh, Y Kwon, Y Kim, LS Kim IEEE Transactions on Computers 66 (4), 688-701, 2016 | 6 | 2016 |
| Rank-level parallelism in dram W Shin, J Jang, J Choi, J Suh, Y Kwon, Y Moon, LS Kim IEEE Transactions on Computers 66 (7), 1274-1280, 2017 | 5 | 2017 |
| Bank-group level parallelism W Shin, J Jang, J Choi, J Suh, LS Kim IEEE Transactions on Computers 66 (8), 1428-1434, 2017 | 4 | 2017 |
| An area-efficient on-chip temperature sensor with nonlinearity compensation using injection-locked oscillator (ILO) W Shin, S Paek, LS Kim 2014 IEEE International Symposium on Circuits and Systems (ISCAS), 1845-1848, 2014 | 4 | 2014 |
| PowerField: A transient temperature-to-power technique based on Markov random field theory S Paek, SH Moon, W Shin, J Sim, LS Kim Proceedings of the 49th Annual Design Automation Conference, 630-635, 2012 | 3 | 2012 |
| Memory device supporting rank-level parallelism and memory system including the same J Jang, Y Kwon, Y Moon, W Shin, LS Kim US, 2019 | | 2019 |
| Department of Electrical Engineering Korea Advanced Institute of Science and Technology (KAIST){wgshin, jeongmin, cjwdream}@ mvlsi. kaist. ac. kr, leesup@ kaist. ac. kr W Shin, J eongmin Yang, J Choi, LS Kim | | |
