Stephan Diestelhorst
Stephan Diestelhorst
System Architect, AMD
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Cited by
Cited by
The gem5 simulator: Version 20.0+
J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ...
arXiv preprint arXiv:2007.03152, 2020
Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack
D Christie, JW Chung, S Diestelhorst, M Hohmuth, M Pohlack, C Fetzer, ...
Proceedings of the 5th European conference on Computer systems, 27-40, 2010
Delegated persist ordering
A Kolli, J Rosen, S Diestelhorst, A Saidi, S Pelley, S Liu, PM Chen, ...
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
Inverted default semantics for in-speculative-region memory accesses
MT Pohlack, MP Hohmuth, S Diestelhorst, DS Christie, J Chung
US Patent App. 12/708,919, 2011
Processor with support for nested speculative sections with different transactional modes
MP Hohmuth, DS Christie, S Diestelhorst
US Patent 8,621,183, 2013
Language-level persistency
A Kolli, V Gogte, A Saidi, S Diestelhorst, PM Chen, S Narayanasamy, ...
Proceedings of the 44th Annual International Symposium on Computer …, 2017
Accurate and stable run-time power modeling for mobile and embedded CPUs
MJ Walker, S Diestelhorst, A Hansson, AK Das, S Yang, BM Al-Hashimi, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
Automatic suspend atomic hardware transactional memory in response to detecting an implicit suspend condition and resume thereof
J Chung, DS Christie, MP Hohmuth, S Diestelhorst, M Pohlack
US Patent 8,739,164, 2014
Hardware transactional memory support for protected and unprotected shared-memory accesses in a speculative section
DS Christie, MP Hohmuth, S Diestelhorst
US Patent App. 12/510,884, 2010
Persistency for synchronization-free regions
V Gogte, S Diestelhorst, W Wang, S Narayanasamy, PM Chen, ...
ACM SIGPLAN Notices 53 (4), 46-61, 2018
ASF: AMD64 extension for lock-free data structures and transactional memory
J Chung, L Yen, S Diestelhorst, M Pohlack, M Hohmuth, D Christie, ...
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 39-50, 2010
Processor support for hardware transactional memory
J Chung, DS Christie, MP Hohmuth, S Diestelhorst, MT Pohlack, L Yen
US Patent 9,880,848, 2018
Coexistence of advanced hardware synchronization and global locks
DS Christie, MP Hohmuth, S Diestelhorst
US Patent 8,407,455, 2013
Protecting large objects within an advanced synchronization facility
MT Pohlack, MP Hohmuth, S Diestelhorst, DS Christie, J Chung
US Patent 8,612,694, 2013
Speculative Region: Hardware Support for Selective Transactional Memory Access Annotation Using Instruction Prefix
J Chung, DS Christie, MP Hohmuth, S Diestelhorst, M Pohlack
US Patent App. 12/764,024, 2010
dist-gem5: Distributed simulation of computer clusters
A Mohammad, U Darbaz, G Dozsa, S Diestelhorst, D Kim, NS Kim
2017 IEEE International Symposium on Performance Analysis of Systems and …, 2017
Compiler support technique for hardware transactional memory systems
J Chung, RU Karpuzcu, DS Christie, MP Hohmuth, S Diestelhorst, ...
US Patent 9,110,691, 2015
The {TURBO} diaries: Application-controlled frequency scaling explained
JT Wamhoff, S Diestelhorst, C Fetzer, P Marlier, P Felber, D Dice
2014 USENIX Annual Technical Conference (USENIX ATC 14), 193-204, 2014
Software wear management for persistent memories
V Gogte, W Wang, S Diestelhorst, A Kolli, PM Chen, S Narayanasamy, ...
17th USENIX Conference on File and Storage Technologies (FAST 19), 45-63, 2019
BRB: Mitigating branch predictor side-channels
I Vougioukas, N Nikoleris, A Sandberg, S Diestelhorst, BM Al-Hashimi, ...
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
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