| Two-dimensional non-separable quaternionic paraunitary filter banks NA Petrovsky, EV Rybenkov, AA Petrovsky 2018 Signal Processing: Algorithms, Architectures, Arrangements, and …, 2018 | 22 | 2018 |
| The CORDIC-inside-lifting architecture for constant-coefficient hardware quaternion multipliers NA Petrovsky, M Parfieniuk 2012 International Conference on Signals and Electronic Systems (ICSES), 1-6, 2012 | 16 | 2012 |
| Low read-only memory distributed arithmetic implementation of quaternion multiplier using split matrix approach N Petrovsky, A Stankevich, A Petrovsky Electronics Letters 50 (24), 1809-1811, 2014 | 15 | 2014 |
| Design and implementation of reversible integer quaternionic paraunitary filter banks on adder-based distributed arithmetic NA Petrovsky, EV Rybenkov, AA Petrovsky 2017 Signal Processing: Algorithms, Architectures, Arrangements, and …, 2017 | 8 | 2017 |
| CORDIC-lifting factorization of paraunitary filter banks based on the quaternionic multipliers for lossless image coding N Petrovsky, A Stankevich, A Petrovsky Multidimensional Systems and Signal Processing 27 (3), 667-695, 2016 | 7 | 2016 |
| Pipelined block-lifting-based embedded processor for multiplying quaternions using distributed arithmetic NA Petrovsky, AV Stankevich, AA Petrovsky 2016 5th Mediterranean Conference on Embedded Computing (MECO), 222-225, 2016 | 7 | 2016 |
| Быстрое прототипирование встраиваемых программируемых систем на ПЛИС для мультимедийных приложений ВВ Ключеня, НА Петровский Информатика, 13-28, 2016 | 6 | 2016 |
| Design and high-performance hardware architecture for image coding using block-lifting-based quaternionic paraunitary filter banks NA Petrovsky, AV Stankevich, AA Petrovsky 2015 4th Mediterranean Conference on Embedded Computing (MECO), 193-198, 2015 | 6 | 2015 |
| Pipelined embedded processor of quaternionic m-band wavelets for image multiresolution analysis NA Petrovsky, M Parfieniuk, A Petrovsky 2013 2nd Mediterranean Conference on Embedded Computing (MECO), 196-199, 2013 | 6 | 2013 |
| Petralex: A smartphone-based real-time digital hearing aid with combined noise reduction and acoustic feedback suppression M Vashkevich, E Azarov, N Petrovsky, A Petrovsky 2017 Signal Processing: Algorithms, Architectures, Arrangements, and …, 2017 | 5 | 2017 |
| Embedded distributed arithmetic based quaternions multiplier of paraunitary filter bank for lossless-to-lossy image coding NA Petrovsky, EV Rybenkov, AA Petrovsky Microprocessors and Microsystems 52, 510-522, 2017 | 5 | 2017 |
| Rapid Prototyping of Quaternion Multiplier: From Matrix Notation to FPGA-Based Circuits M Parfieniuk, NA Petrovsky, AA Petrovsky | 5* | |
| Real-time implementation of hearing aid with combined noise and acoustic feedback reduction based on smartphone M Vashkevich, E Azarov, N Petrovsky, D Likhachov, A Petrovsky 2017 IEEE International Conference on Acoustics, Speech and Signal …, 2017 | 4 | 2017 |
| Structurally orthogonal finite precision FPGA implementation of block-lifting-based quaternionic paraunitary filter banks for L2L image coding NA Petrovsky, EV Rybenkov, AA Petrovsky 2017 22nd International Conference on Digital Signal Processing (DSP), 1-5, 2017 | 3 | 2017 |
| Multiplierless structurally orthogonal block-lifting-based quaternionic paraunitary filter banks with sum-of-powers-of-two coefficients NA Petrovsky, EV Rybenkov, AA Petrovsky 2017 6th Mediterranean Conference on Embedded Computing (MECO), 1-4, 2017 | 3 | 2017 |
| CORDIC-техника для фиксированного угла вращения в операции умножения кватернионов НА Петровский, АВ Станкевич, АА Петровский Информатика, 85-108, 2016 | 3 | 2016 |
| FPSoC using Xilinx Zynq for medical image coding based on the quaternionic paraunitary filter banks N Petrovsky, A Stankevich, A Petrovsky 2015 17th International Conference on E-health Networking, Application …, 2015 | 3 | 2015 |
| Рекурсивный процессор умножителя кватернионов со структурной CORDIC-лестничной параметризацией НА Петровский, АВ Станкевич БГУИР, 2013 | 3 | 2013 |
| Процессор обработки изображения на многополосном вейвлет-преобразовании в алгебре кватернионов НА Петровский Доклады Белорусского государственного университета информатики и …, 2011 | 3 | 2011 |
| High performance multiplier-less pipelined FPGA architecture for 2-D non-separable quaternionic filter banks EV Rybenkov, NA Petrovsky 2020 Signal Processing: Algorithms, Architectures, Arrangements, and …, 2020 | 2 | 2020 |
Eugene Rybenkov ( Рыбенков Е.В. )БГУИРПодтвержден адрес электронной почты в домене bsuir.by
