| Towards characterizing cloud backend workloads: insights from google compute clusters AK Mishra, JL Hellerstein, W Cirne, CR Das ACM SIGMETRICS Performance Evaluation Review 37 (4), 34-41, 2010 | 474 | 2010 |
| From high-level deep neural models to FPGAs H Sharma, J Park, D Mahajan, E Amaro, JK Kim, C Shao, A Mishra, ... 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016 | 471 | 2016 |
| OWL: cooperative thread array aware scheduling techniques for improving GPGPU performance A Jog, O Kayiran, N Chidambaram Nachiappan, AK Mishra, MT Kandemir, ... ACM SIGPLAN Notices 48 (4), 395-406, 2013 | 339 | 2013 |
| Cache revive: Architecting volatile STT-RAM caches for enhanced performance in CMPs A Jog, AK Mishra, C Xu, Y Xie, V Narayanan, R Iyer, CR Das DAC Design Automation Conference 2012, 243-252, 2012 | 328 | 2012 |
| MIRA: A multi-layered on-chip interconnect router architecture D Park, S Eachempati, R Das, AK Mishra, Y Xie, N Vijaykrishnan, CR Das 2008 International Symposium on Computer Architecture, 251-261, 2008 | 287 | 2008 |
| Accelerating binarized neural networks: Comparison of FPGA, CPU, GPU, and ASIC E Nurvitadhi, D Sheffield, J Sim, A Mishra, G Venkatesh, D Marr 2016 International Conference on Field-Programmable Technology (FPT), 77-84, 2016 | 276 | 2016 |
| WRPN: Wide reduced-precision networks A Mishra, E Nurvitadhi, JJ Cook, D Marr arXiv preprint arXiv:1709.01134, 2017 | 275 | 2017 |
| Apprentice: Using knowledge distillation techniques to improve low-precision network accuracy A Mishra, D Marr arXiv preprint arXiv:1711.05852, 2017 | 259 | 2017 |
| Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs R Das, S Eachempati, AK Mishra, V Narayanan, CR Das 2009 IEEE 15th International Symposium on High Performance Computer …, 2009 | 246 | 2009 |
| Orchestrated scheduling and prefetching for GPGPUs A Jog, O Kayiran, AK Mishra, MT Kandemir, O Mutlu, R Iyer, CR Das Proceedings of the 40th Annual International Symposium on Computer …, 2013 | 229 | 2013 |
| Scheduling techniques for GPU architectures with processing-in-memory capabilities A Pattnaik, X Tang, A Jog, O Kayiran, AK Mishra, MT Kandemir, O Mutlu, ... Proceedings of the 2016 International Conference on Parallel Architectures …, 2016 | 183 | 2016 |
| Accelerating recurrent neural networks in analytics servers: Comparison of FPGA, CPU, GPU, and ASIC E Nurvitadhi, J Sim, D Sheffield, A Mishra, S Krishnan, D Marr 2016 26th International Conference on Field Programmable Logic and …, 2016 | 171 | 2016 |
| A case for heterogeneous on-chip interconnects for CMPs AK Mishra, N Vijaykrishnan, CR Das ACM SIGARCH Computer Architecture News 39 (3), 389-400, 2011 | 153 | 2011 |
| A case for dynamic frequency tuning in on-chip networks AK Mishra, R Das, S Eachempati, R Iyer, N Vijaykrishnan, CR Das 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture …, 2009 | 143 | 2009 |
| Runnemede: An architecture for ubiquitous high-performance computing NP Carter, A Agrawal, S Borkar, R Cledat, H David, D Dunning, J Fryman, ... 2013 IEEE 19th International Symposium on High Performance Computer …, 2013 | 129 | 2013 |
| Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs AK Mishra, X Dong, G Sun, Y Xie, N Vijaykrishnan, CR Das 2011 38th Annual International Symposium on Computer Architecture (ISCA), 69-80, 2011 | 123 | 2011 |
| Performance and power optimization through data compression in network-on-chip architectures R Das, AK Mishra, C Nicopoulos, D Park, V Narayanan, R Iyer, MS Yousif, ... 2008 IEEE 14th International Symposium on High Performance Computer …, 2008 | 122 | 2008 |
| A heterogeneous multiple network-on-chip design: an application-aware approach AK Mishra, O Mutlu, CR Das 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-10, 2013 | 100 | 2013 |
| METE: meeting end-to-end QoS in multicores through system-wide resource management A Sharifi, S Srikantaiah, AK Mishra, M Kandemir, CR Das Proceedings of the ACM SIGMETRICS joint international conference on …, 2011 | 98 | 2011 |
| An energy-efficient heterogeneous CMP based on hybrid TFET-CMOS cores V Saripalli, A Mishra, S Datta, V Narayanan Proceedings of the 48th Design Automation Conference, 729-734, 2011 | 86 | 2011 |
Chita R. DasPenn State UniversityVerified email at cse.psu.edu
