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Rogério Paludo
Rogério Paludo
FPGA Engineer@Capgemini Portugal
Verified email at capgemini.com - Homepage
Title
Cited by
Cited by
Year
NTT architecture for a linux-ready RISC-V fully-homomorphic encryption accelerator
R Paludo, L Sousa
IEEE Transactions on Circuits and Systems I: Regular Papers 69 (7), 2669-2682, 2022
242022
Efficient implementation of modular multiplication by constants applied to RNS reverse converters
R de Matos, R Paludo, N Chervyakov, PA Lyakhov, H Pettenghi
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
192017
Towards the integration of reverse converters into the RNS channels
L Sousa, R Paludo, P Martins, H Pettenghi
IEEE Transactions on Computers 69 (3), 342-348, 2019
62019
Efficient RNS Reverse Converters for Moduli Sets with Dynamic Ranges Up to -bit
H Pettenghi, R Paludo, R Matos, PA Lyakhov
Circuits, Systems, and Signal Processing 37, 5178-5196, 2018
42018
Number theoretic transform architecture suitable to lattice-based fully-homomorphic encryption
R Paludo, L Sousa
2021 IEEE 32nd International Conference on Application-specific Systems …, 2021
32021
A methodology for early functional verification of embedded software combining virtual platforms and bounded model checking
R Paludo, D Lettnin
2016 17th Latin-American Test Symposium (LATS), 141-146, 2016
12016
Implementações eficientes de conversores reversos e multiplicações por constante usando residue number systems
R Paludo
2020
Metodologia para verificação funcional antecipada de software embarcado combinado plataformas virtuais e verificação formal
R Paludo
2016
Uso de Estratégias de Multiplicação por Múltiplas Constantes para Implementação de Filtros Volterra
R Paludo, ELO Batista
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Articles 1–9