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Thomas Cho
Thomas Cho
Подтвержден адрес электронной почты в домене kaist.ac.kr
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Процитировано
Процитировано
Год
A 10 b, 20 Msample/s, 35 mW pipeline A/D converter
TB Cho, PR Gray
IEEE journal of solid-state circuits 30 (3), 166-172, 1995
9721995
A 1.9-GHz wide-band IF double conversion CMOS receiver for cordless telephone applications
JC Rudell, JJ Ou, TB Cho, G Chien, F Brianti, JA Weldon, PR Gray
IEEE Journal of Solid-State Circuits 32 (12), 2071-2088, 1997
7311997
A 1.9 GHz wide-band IF double conversion CMOS integrated receiver for cordless telephone applications
JC Rudell, JJ Ou, TB Cho, G Chien, F Brianti, JA Weldon, PR Gray
1997 IEEE International Solids-State Circuits Conference. Digest of …, 1997
1571997
A 28-nm 75-fsrms Analog Fractional- Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle …
W Wu, CW Yao, K Godbole, R Ni, PY Chiang, Y Han, Y Zuo, A Verma, ...
IEEE Journal of Solid-State Circuits 54 (5), 1254-1265, 2019
1482019
A 10-bit, 20-MS/s, 35-mW pipeline A/D converter
TB Cho, PR Gray
Proceedings of IEEE Custom Integrated Circuits Conference-CICC'94, 499-502, 1994
1291994
A 2.4-GHz dual-mode 0.18-/spl mu/m CMOS transceiver for Bluetooth and 802.11 b
TB Cho, D Kang, CH Heng, BS Song
IEEE journal of solid-state circuits 39 (11), 1916-1926, 2004
1172004
Low-power low-voltage analog-to-digital conversion techniques using pipelined architectures
TB Cho
University of California, Berkeley, 1995
1131995
A single-chip CMOS direct-conversion transceiver for 900 MHz spread-spectrum digital cordless phones
T Cho, E Dukatz, M Mack, D Macnally, M Marringa, S Mehta, C Nilson, ...
1999 IEEE International Solid-State Circuits Conference. Digest of Technical …, 1999
1021999
A sub-6-GHz 5G new radio RF transceiver supporting EN-DC with 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS
J Lee, S Han, J Lee, B Kang, J Bae, J Jang, S Oh, JS Chang, S Kang, ...
IEEE Journal of Solid-State Circuits 54 (12), 3541-3552, 2019
792019
Antenna interface
DE MacNally, TB Cho
US Patent 6,735,418, 2004
792004
Reconfigurable analog baseband for a single-chip dual-mode transceiver
T Cho
US Patent 7,283,840, 2007
722007
A 14-nm 0.14-psrmsFractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration
CW Yao, R Ni, C Lau, W Wu, K Godbole, Y Zuo, S Ko, NS Kim, S Han, I Jo, ...
IEEE Journal of Solid-State Circuits 52 (12), 3446-3457, 2017
702017
A 14-nm Ultra-Low Jitter Fractional-N PLL Using a DTC Range Reduction Technique and a Reconfigurable Dual-Core VCO
W Wu, CW Yao, C Guo, PY Chiang, L Chen, PK Lau, Z Bai, SW Son, ...
IEEE Journal of Solid-State Circuits 56 (12), 3756-3767, 2021
652021
A power-optimized CMOS baseband channel filter and ADC for cordless applications
TB Cho, G Chien, F Brianti, PR Gray
1996 Symposium on VLSI Circuits. Digest of Technical Papers, 64-65, 1996
471996
NB-IoT and GNSS all-in-one system-on-chip integrating RF transceiver, 23-dBm CMOS power amplifier, power management unit, and clock management system for low cost solution
J Lee, J Han, CL Lo, J Lee, W Kim, S Kim, B Kang, J Han, S Jung, ...
IEEE Journal of Solid-State Circuits 55 (12), 3400-3413, 2020
442020
15.1 An 88%-Efficiency Supply Modulator Achieving 1.08 μs/V Fast Transition and 100MHz Envelope-Tracking Bandwidth for 5G New Radio RF Power Amplifier
JS Paek, D Kim, JS Bang, J Baek, J Choi, T Nomiyama, J Han, Y Choo, ...
2019 IEEE International Solid-State Circuits Conference-(ISSCC), 238-240, 2019
442019
32.2 A 14nm analog sampling fractional-N PLL with a digital-to-time converter range-reduction technique achieving 80fs integrated jitter and 93fs at near-integer channels
W Wu, CW Yao, C Guo, PY Chiang, PK Lau, L Chen, SW Son, TB Cho
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 444-446, 2021
432021
A 16-channel, 28/39GHz dual-polarized 5G FR2 phased-array transceiver IC with a quad-stream IF transceiver supporting non-contiguous carrier aggregation up to 1.6 GHz BW
A Verma, V Bhagavatula, A Singh, W Wu, H Nagarajan, PK Lau, X Yu, ...
2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022
422022
11.7 a voltage-tolerant three-level buck-boost dc-dc converter with continuous transfer current and flying capacitor soft charger achieving 96.8% power efficiency and 0.87 µs/v …
J Baek, T Nomiyama, S Park, YH Jung, D Kim, J Han, JS Bang, Y Lee, ...
2020 IEEE International Solid-State Circuits Conference-(ISSCC), 202-204, 2020
412020
A− 137 dBm/Hz noise, 82% efficiency AC-coupled hybrid supply modulator with integrated buck-boost converter
JS Paek, SC Lee, YS Youn, D Kim, JH Choi, J Jung, YH Choo, SJ Lee, ...
IEEE Journal of Solid-State Circuits 51 (11), 2757-2768, 2016
412016
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