Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs. K Gaj, E Homsirikamol, M Rogawski, R Shahid, MU Sharif IACR Cryptology EPrint Archive 2012, 368, 2012 | 94 | 2012 |
Comprehensive Evaluation of High-Speed and Medium-Speed Implementations of Five SHA-3 Finalists Using Xilinx and Altera FPGAs. K Gaj, E Homsirikamol, M Rogawski, R Shahid, MU Sharif 3rd SHA-3 Candidate Conference, 2012 | 94 | 2012 |
Use of embedded FPGA resources in implementations of 14 round 2 SHA-3 candidates R Shahid, MU Sharif, M Rogawski, K Gaj Field-Programmable Technology (FPT), 2011 International Conference on, 1-9, 2011 | 36 | 2011 |
Use of embedded FPGA resources in implementations of five round three SHA-3 candidates MU Sharif, R Shahid, M Rogawski, K Gaj Ecrypt II Hash Workshop, 2011 | 36* | 2011 |
Productivity of GPUs under different programming paradigms M Malik, T Li, U Sharif, R Shahid, T El‐Ghazawi, G Newby Concurrency and computation: practice and experience 24 (2), 179-191, 2012 | 29 | 2012 |
Hardware-Software Codesign of RSA for Optimal Performance vs. Flexibility Trade-off MU Sharif, R Shahid, R Marcin, K Gaj 26th International Conference on Field Programmable Logic and Applications …, 2016 | 14 | 2016 |
A Generic Approach to the Development of Coprocessors for Elliptic Curve Cryptosystems R Shahid, T Winograd, K Gaj Parallel and Distributed Processing Symposium Workshops (IPDPSW), 2017 IEEE …, 2017 | 1 | 2017 |
An Automated Scheduler-based Approach for the Development of Cryptoprocessors for Pairing-Based Cryptosystems T Winograd, R Shahid, K Gaj in 26th Reconfigurable Architectures Workshop, RAW 2019, Rio de Janeiro, Brazil, 2019 | | 2019 |