| Unfolding-based process discovery H Ponce de León, C Rodríguez, J Carmona, K Heljanko, S Haar International Symposium on Automated Technology for Verification and …, 2015 | 27* | 2015 |
| Conformance Relations for Labeled Event Structures. H Ponce de León, S Haar, D Longuet TAP, 83-98, 2012 | 18* | 2012 |
| Unfolding-based test selection for concurrent conformance H Ponce de León, S Haar, D Longuet IFIP International Conference on Testing Software and Systems, 98-113, 2013 | 17 | 2013 |
| BMC for weak memory models: Relation analysis for compact SMT encodings N Gavrilenko, H Ponce-de-León, F Furbach, K Heljanko, R Meyer International Conference on Computer Aided Verification, 355-365, 2019 | 15 | 2019 |
| Portability Analysis for Axiomatic Memory Models. PORTHOS: One Tool for all Models H Ponce de León, F Furbach, K Heljanko, R Meyer arXiv preprint arXiv:1702.06704, 2017 | 14* | 2017 |
| Model-based testing for concurrent systems: unfolding-based test selection H Ponce de León, S Haar, D Longuet International Journal on Software Tools for Technology Transfer 18 (3), 305-318, 2016 | 14 | 2016 |
| Model‐based testing for concurrent systems with labelled event structures H Ponce de León, S Haar, D Longuet Software Testing, Verification and Reliability 24 (7), 558-590, 2014 | 14 | 2014 |
| Distributed testing of concurrent systems: vector clocks to the rescue H Ponce de León, S Haar, D Longuet International Colloquium on Theoretical Aspects of Computing, 369-387, 2014 | 11 | 2014 |
| Incorporating negative information in process discovery H Ponce de Léon, J Carmona, SKLM Vanden Broucke International Conference on Business Process Management, 126-143, 2015 | 8 | 2015 |
| Building bridges between sets of partial orders H Ponce de León, A Mokhov International Conference on Language and Automata Theory and Applications, 2015 | 7 | 2015 |
| Distributed analysis for diagnosability in concurrent systems H Ponce de León, G Bonigo, LB Briones arXiv preprint arXiv:1502.07466, 2015 | 7 | 2015 |
| BMC with memory models as modules H Ponce-de-León, F Furbach, K Heljanko, R Meyer 2018 Formal Methods in Computer Aided Design (FMCAD), 1-9, 2018 | 6 | 2018 |
| Dartagnan: Bounded Model Checking for Weak Memory Models (Competition Contribution) H Ponce-de-León, F Furbach, K Heljanko, R Meyer International Conference on Tools and Algorithms for the Construction and …, 2020 | 5 | 2020 |
| Unfolding based minimal test suites for testing multithreaded programs H Ponce de León, O Saarikivi, K Kähkönen, K Heljanko, J Esparza Application of Concurrency to System Design (ACSD), 2015 15th International …, 2015 | 5* | 2015 |
| Automatic Decomposition of Petri Nets into Automata Networks–A Synthetic Account P Bouvier, H Garavel, H Ponce-de-León International Conference on Applications and Theory of Petri Nets and …, 2020 | 3 | 2020 |
| Incorporating negative information to process discovery of complex systems HP de León, L Nardelli, J Carmona, SKLM vanden Broucke Information Sciences 422, 480-496, 2018 | 3 | 2018 |
| Minimizing Test Suites with Unfoldings of Multithreaded Programs O Saarikivi, H Ponce de León, K Kähkönen, K Heljanko, J Esparza ACM Transactions on Embedded Computing Systems (TECS) 16 (2), 45, 2017 | 3 | 2017 |
| POD: A tool for process discovery using partial orders and independence information H Ponce de León, C Rodríguez, J Carmona Vargas Proceedings of the BPM Demo Session 2015: Co-located with the 13th …, 2015 | 3 | 2015 |
| Test Case Generation for Concurrent Systems Using Event Structures K Athanasiou, H Ponce de León, S Schwoon International Conference on Tests and Proofs, 19-37, 2015 | 2 | 2015 |
| Dartagnan: Leveraging compiler optimizations and the price of precision (competition contribution) H Ponce-de-León, T Haas, R Meyer Proc. TACAS (2). LNCS 12652, 0 | 2 | |
Keijo HeljankoProfessor of Computer Science, Department of Computer Science, University of HelsinkiVerified email at helsinki.fi
