Sri Hari Krishna Narayanan
Sri Hari Krishna Narayanan
Computer Scientist, Mathematics and Computer Science, Argonne National Laboratory.
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Cited by
Cited by
Process variation aware thread mapping for chip multiprocessors
S Hong, SHK Narayanan, M Kandemir, O Ozturk
2009 Design, Automation & Test in Europe Conference & Exhibition, 821-826, 2009
Optimizing shared cache behavior of chip multiprocessors
M Kandemir, SP Muralidhara, SHK Narayanan, Y Zhang, O Ozturk
Proceedings of the 42nd Annual IEEE/ACM International Symposium on …, 2009
Minimizing energy consumption of banked memories using data recomputation
H Koc, O Ozturk, M Kandemir, SHK Narayanan, E Ercanli
Proceedings of the 2006 international symposium on Low power electronics and …, 2006
ADIC2: Development of a component source transformation system for differentiating C and C++
SHK Narayanan, B Norris, B Winnicka
Procedia Computer Science 1 (1), 1845-1853, 2010
Generating performance bounds from source code
SHK Narayanan, B Norris, PD Hovland
2010 39th International Conference on Parallel Processing Workshops, 197-206, 2010
Exascale workload characterization and architecture implications
P Balaprakash, D Buntinas, A Chan, A Guha, R Gupta, SHK Narayanan, ...
2013 IEEE International Symposium on Performance Analysis of Systems and …, 2013
Compiler-directed power density reduction in NoC-based multicore designs
S Narayanan, M Kandemir, O Ozturk
7th International Symposium on Quality Electronic Design (ISQED'06), 6 pp.-575, 2006
A scratch-pad memory aware dynamic loop scheduling algorithm
O Ozturk, M Kandemir, SHK Narayanan
9th International Symposium on Quality Electronic Design (isqed 2008), 738-743, 2008
Performance of automatic differentiation tools in the dynamic simulation of multibody systems
A Callejo, SHK Narayanan, JG de Jalón, B Norris
Advances in Engineering Software 73, 35-44, 2014
An optimized treatment for algorithmic differentiation of an important glaciological fixed-point problem
DN Goldberg, SHK Narayanan, L Hascoet, J Utke
Geoscientific Model Development 9 (5), 1891-1904, 2016
Temperature-sensitive loop parallelization for chip multiprocessors
SHK Narayanan, G Chen, M Kandemir, Y Xie
2005 International Conference on Computer Design, 677-682, 2005
Using Loop Invariants to Fight Soft Errors in Data Caches
FL Sri Hari Krishna N. , Seung Woo Son, Mahmut Kandemir
ASP-DAC '05 Proceedings of the 2005 Asia and South Pacific Design Automation …, 2005
An optimized treatment for algorithmic differentiation of an important glaciological fixed-point problem, Geosci. Model Dev., 9, 1891–1904
DN Goldberg, SHK Narayanan, L Hascoet, J Utke
gmd-9-1891-2016, 2016
Securing disk-resident data through application level encryption
R Prabhakar, SW Son, C Patrick, SHK Narayanan, M Kandemir
Fourth International IEEE Security in Storage Workshop, 46-57, 2007
Automatic differentiation for adjoint stencil loops
J Hückelheim, N Kukreja, SHK Narayanan, F Luporini, G Gorman, ...
Proceedings of the 48th International Conference on Parallel Processing, 1-10, 2019
Sparse jacobian computation using ADIC2 and ColPack
SHK Narayanan, B Norris, P Hovland, DC Nguyen, AH Gebremedhin
Procedia Computer Science 4, 2115-2123, 2011
In-network caching for chip multiprocessors
A Yanamandra, MJ Irwin, V Narayanan, M Kandemir, SHK Narayanan
International Conference on High-Performance Embedded Architectures and …, 2009
Algorithmic differentiation of shadowing sensitivities in chaotic systems
N Chandramoorthy, Q Wang, L Magri, SHK Narayanan, P Hovland, A Ni
SIAM Workshop on Combinatorial Scientific Computing, 1-18, 2018
A mixed approach to adjoint computation with algorithmic differentiation
K Kulshreshtha, SHK Narayanan, T Albring
IFIP Conference on System Modeling and Optimization, 331-340, 2015
Compiler directed network-on-chip reliability enhancement for chip multiprocessors
O Ozturk, M Kandemir, MJ Irwin, SHK Narayanan
ACM Sigplan Notices 45 (4), 85-94, 2010
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