Uksong Kang
Uksong Kang
SK Hynix, Vice President
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Cited by
Cited by
8 Gb 3-D DDR3 DRAM using through-silicon-via technology
U Kang, HJ Chung, S Heo, DH Park, H Lee, JH Kim, SH Ahn, SH Cha, ...
IEEE Journal of Solid-State Circuits 45 (1), 111-119, 2009
A high-speed capacitive humidity sensor with on-chip thermal reset
U Kang, KD Wise
IEEE Transactions on Electron Devices 47 (4), 702-710, 2000
Semiconductor package having memory devices stacked on logic device
K Uk-Song
US Patent 7,834,450, 2010
Co-architecting controllers and DRAM to enhance DRAM process scaling
U Kang, HS Yu, C Park, H Zheng, J Halbert, K Bains, S Jang, JS Choi
The memory forum 14, 2014
Multi-chip memory device with stacked memory chips, method of stacking memory chips, and method of controlling operation of multi-chip package memory
H Chung, JB Lee, K Uk-Song
US Patent 7,830,692, 2010
Semiconductor device having stacked structure including through-silicon-vias and method of testing the same
K Uk-Song
US Patent App. 13/312,000, 2012
Stacked memory module and system
K Uk-Song, H Chung, JS Choi, H Lee
US Patent 8,031,505, 2011
Memory system
H Yu, K Uk-Song, CW Park, JS Choi, HS Hwang
US Patent App. 13/604,308, 2013
A 1.2 V 20 nm 307 GB/s HBM DRAM with at-speed wafer-level IO test scheme and adaptive refresh considering temperature distribution
K Sohn, WJ Yun, R Oh, CS Oh, SY Seo, MS Park, DH Shin, WC Jung, ...
IEEE Journal of Solid-State Circuits 52 (1), 250-260, 2016
Method and apparatus for refreshing and data scrubbing memory device
K Uk-Song, H Yu, CW Park
US Patent 9,053,813, 2015
Memory modules and memory systems
JP Son, K Uk-Song, CW Park, YS Sohn
US Patent 9,087,614, 2015
Methods of operating semiconductor memory devices with selective write-back of data for error scrubbing and related devices
CHA Sang-Uhn, H Chung, K Uk-Song
US Patent 9,990,163, 2018
Multi-chip package (MCP) having three dimensional mesh-based power distribution network, and power distribution method of the MCP
H Lee, KW Lee, K Uk-Song
US Patent App. 12/458,124, 2010
Semiconductor memory device
K Uk-Song, YH Jun, JS Choi
US Patent 8,885,380, 2014
Semiconductor package having memory devices stacked on logic device
K Uk-Song
US Patent 8,253,244, 2012
Integrated DDR/SDR flow control managers that support multiple queues and MUX, DEMUX and broadcast operating modes
RT Knaack, DS Gibson, M Montana, M Au, S Speed, SSB Bamdhamravuri, ...
US Patent 7,082,071, 2006
Semiconductor having chip stack, semiconductor system, and method of fabricating the semiconductor apparatus
K Uk-Song, H Lee
US Patent 8,648,429, 2014
Stacked memory device
K Uk-Song, JB Lee, H Chung
US Patent 7,999,367, 2011
Semiconductor memory device for byte-based masking operation and method of generating parity data
BG Park, K Uk-Song, SJ Rhee
US Patent 8,132,086, 2012
Programmable mixed-voltage sensor readout circuit and bus interface with built-in self-test
AV Chavan, A Mason, U Kang, KD Wise
1999 IEEE International Solid-State Circuits Conference. Digest of Technical …, 1999
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