Pierre Boulet

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Philippe MarquetUniv. LilleVerified email at univ-lille1.fr
Cedric DumoulinAssistant Professor of Computer Science, University of LilleVerified email at univ-lille.fr
Yves RobertProfessor of Computer Science, ENS LyonVerified email at ens-lyon.fr
Abdoulaye GamatiéCNRS Senior ResearcherVerified email at lirmm.fr
Samy MeftaliUniversité de Lille1, LIFL, INRIA Lille-Nord EuropeVerified email at lifl.fr
Alain DarteCNRSVerified email at ens-lyon.fr
Eric RUTTENInriaVerified email at inria.fr
Mahyar ShahsavariImperial College LondonVerified email at imperial.ac.uk
Frédéric VivienSenior researcher, INRIAVerified email at inria.fr
Ouassila Labbani NarsisAssociate Professor - University of Burgundy - CIAD LaboratoryVerified email at u-bourgogne.fr
Sebastien GerardCEA ListVerified email at cea.fr
Rabie Ben AtitallahGalatasaray ÜniversitesiVerified email at gsu.edu.tr
Huafeng YuBoeing Research & TechnologyVerified email at boeing.com
Jack DongarraUniversity of Tennessee; Oak Ridge National Laboratory; University of ManchesterVerified email at icl.utk.edu
Pierre FalezPhD, CRIStAL, Université de LilleVerified email at univ-lille.fr
Anne EtienFull Professor, University of LilleVerified email at univ-lille.fr
Tanguy RissetVerified email at insa-lyon.fr
Dr. Amine El KouhenResearch Associate, Concordia UniversityVerified email at entimo.de
Smail NIARUniversité Polytechnique Hauts-de-France, FranceVerified email at uphf.fr
Pierre TirillyAssistant professor, Université de Lille 1Verified email at lifl.fr

Pierre Boulet

Univ. Lille

Verified email at univ-lille.fr - Homepage

computer science neuromorphic computing embedded systems


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Loop parallelization algorithms: From parallelism extraction to code generation P Boulet, A Darte, GA Silber, F Vivien Parallel Computing 24 (3-4), 421-444, 1998	121	1998
(Pen)-ultimate tiling? P Boulet, A Darte, T Risset, Y Robert Integration 17 (1), 33-51, 1994	105	1994
Array-OL revisited, multidimensional intensive signal processing specification P Boulet INRIA, 2007	102	2007
Algorithmic issues on heterogeneous computing platforms P Boulet, J Dongarra, F Rastello, Y Robert, F Vivien Parallel processing letters 9 (02), 197-213, 1999	65	1999
MDA for SoC embedded systems design, intensive signal processing experiment P Boulet, JL Dekeyser, C Dumoulin, P Marquet SIVOES-MDA workshop at UML, 20-24, 2003	61*	2003
Gaspard2: from MARTE to SystemC simulation É Piel, RB Atitallah, P Marquet, S Meftali, S Niar, A Etien, JL Dekeyser, ... proc. of the DATE 8, 2008	60	2008
Scanning polyhedra without Do-loops P Boulet, P Feautrier Proceedings. 1998 International Conference on Parallel Architectures and …, 1998	47	1998
Introducing control in the gaspard2 data-parallel metamodel: Synchronous approach O Labbani, JL Dekeyser, P Boulet, É Rutten	44	2005
Static tiling for heterogeneous computing platforms P Boulet, J Dongarra, Y Robert, F Vivien Parallel Computing 25 (5), 547-568, 1999	44	1999
Mode-automata based methodology for scade O Labbani, JL Dekeyser, P Boulet International Workshop on Hybrid Systems: Computation and Control, 386-401, 2005	42	2005
Evaluation of modeling tools adaptation A El Kouhen, C Dumoulin, S Gerard, P Boulet	39	2012
Expressing embedded systems configurations at high abstraction levels with UML MARTE profile: Advantages, limitations and alternatives IR Quadri, A Gamatié, P Boulet, S Meftali, JL Dekeyser Journal of systems architecture 58 (5), 178-194, 2012	37	2012
Model driven engineering for SoC co-design J Dekeyser, P Boulet, P Marquet, S Meftali The 3rd International IEEE-NEWCAS Conference, 2005., 21-25, 2005	36	2005
Array-OL with delays, a domain specific specification language for multidimensional intensive signal processing C Glitia, P Dumont, P Boulet Multidimensional Systems and Signal Processing 21 (2), 105-131, 2010	34	2010
Formal semantics of Array-OL, a domain specific language for intensive multidimensional signal processing P Boulet INRIA, 2008	34	2008
Another multidimensional synchronous dataflow: Simulating Array-OL in ptolemy II P Dumont, P Boulet INRIA, 2005	34	2005
Projection of the Array-OL specification language onto the Kahn process network computation model A Amar, P Boulet, P Dumont 8th International Symposium on Parallel Architectures, Algorithms and …, 2005	33	2005
Repetitive Allocation Modelling with MARTE. P Boulet, P Marquet, É Piel, J Taillard FDL, 280-285, 2007	31	2007
Towards UML 2 extensions for compact modeling of regular complex topologies A Cuccuru, JL Dekeyser, P Marquet, P Boulet International Conference on Model Driven Engineering Languages and Systems …, 2005	27	2005
Modeling of configurations for embedded system implementations in MARTE IR Quadri, A Gamatié, P Boulet, JL Dekeyser	26	2010

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