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Niraj Nandan
Niraj Nandan
Architect and Principal Lead - Texas Instruments
Verified email at ti.com
Title
Cited by
Cited by
Year
High throughput VLSI architecture supporting HEVC loop filter for Ultra HDTV
M Mody, N Nandan, T Hideo
2013 IEEE Third International Conference on Consumer Electronics¿ Berlin …, 2013
272013
Methods and apparatus to generate wide dynamic range images
MN Mody, N Nandan, H Sanghavi, R Allu
US Patent 9,538,092, 2017
202017
Sample adaptive offset (SAO) filtering in video coding
MN Mody, N Nandan, H Tamama
US Patent 9,473,784, 2016
162016
Image signal processing for front camera based automated driver assistance system
M Mody, N Nandan, S Dabral, H Sanghvi, R Sagar, Z Nikolic, K Chitnis, ...
2015 IEEE 5th International Conference on Consumer Electronics-Berlin (ICCE …, 2015
162015
High quality image processing system for ADAS
M Mody, S Dabral, M Magla, H Sanghvi, N Nandan, K Chitnis, B Jadhav, ...
2019 IEEE International Conference on Electronics, Computing and …, 2019
112019
Flexible Wide Dynamic Range (WDR) processing support in image signal processor (ISP)
M Mody, N Nandan, HSR Allu, R Sagar
2015 IEEE International Conference on Consumer Electronics (ICCE), 467-470, 2015
112015
High performance and flexible imaging Sub-system
M Mody, H Sanghvi, N Nandan, S Dabral, R Allu, D Soni, S Sah, ...
2014 International Conference on Advances in Computing, Communications and …, 2014
112014
Method and apparatus of HEVC de-blocking filter
MN Mody, N Nandan, H Tamama
US Patent 9,854,252, 2017
102017
High performance DMA controller for ultra HDTV video codecs
N Nandan
2014 IEEE International Conference on Consumer Electronics (ICCE), 65-66, 2014
92014
Image processing for wide dynamic range (WDR) sensor data
S Dabral, MN Mody, G Hua, A Lell, N Nandan, R Allu
US Patent 9,871,965, 2018
82018
System and method for managing cache
PD Karandikar, M Mody, H Sanghavi, V Easwaran, PYA Shankar, R Gulati, ...
US Patent 9,430,393, 2016
82016
Down scaling images in a computer vision system
MN Mody, B Chae, S Dabral, N Nandan, H Sanghvi
US Patent 10,755,380, 2020
72020
Method and apparatus of HEVC de-blocking filter
MN Mody, N Nandan, H Tamama
US Patent 10,455,238, 2019
72019
Flexible and efficient perspective transform engine
M Mody, R Allu, N Nandan, G Hua, H Sanghvi, S Dabral, B Jadav, ...
2017 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia …, 2017
72017
Scalable High performance Loop filter architecture for video codecs
N Nandan, M Mody
2013 IEEE Second International Conference on Image Information Processing …, 2013
72013
Method and apparatus for arbitrary output shape processing of an image
RR Allu, N Nandan, MN Mody, G Hua, BO Chae, S Dabral, H Sanghvi, ...
US Patent 11,145,079, 2021
62021
Scheduling of concurrent block based data processing tasks on a hardware thread scheduler
H Sanghvi, N Nandan, MN Mody, KS Chitnis
US Patent 10,489,206, 2019
62019
Method for scheduling a processing device
N Nandan, H Sanghvi, MN Mody
US Patent 10,296,393, 2019
62019
A 28nm programmable and low power ultra-HD video codec engine
H Sanghvi, M Mody, N Nandan, M Mehendale, S Das, DK Mandal, ...
2014 IEEE International Symposium on Circuits and Systems (ISCAS), 558-561, 2014
62014
Bandwidth controlled data synchronization for image and vision processor
N Nandan, H Sanghvi, MN Mody
US Patent 10,776,167, 2020
52020
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