IEEE Int. Electron Devices Meet B Govoreanu, GS Kar, YY Chen, V Paraschiv, S Kubicek, A Fantini, ...
Tech. Dig 729, 2011
1006 * 2011 10×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation B Govoreanu, GS Kar, YY Chen, V Paraschiv, S Kubicek, A Fantini, ...
2011 International Electron Devices Meeting, 31.6. 1-31.6. 4, 2011
907 2011 10×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation B Govoreanu, GS Kar, YY Chen, V Paraschiv, S Kubicek, A Fantini, ...
2011 International Electron Devices Meeting, 31.6. 1-31.6. 4, 2011
901 2011 Endurance/Retention Trade-off on Cap 1T1R Bipolar RRAM YY Chen, L Goux, S Clima, B Govoreanu, R Degraeve, GS Kar, A Fantini, ...
IEEE Transactions on electron devices 60 (3), 1114-1121, 2013
281 2013 Intrinsic switching variability in HfO2 RRAM A Fantini, L Goux, R Degraeve, DJ Wouters, N Raghavan, G Kar, ...
2013 5th IEEE International Memory Workshop, 30-33, 2013
252 2013 Balancing SET/RESET Pulse for Endurance in 1T1R Bipolar RRAM YY Chen, B Govoreanu, L Goux, R Degraeve, A Fantini, GS Kar, ...
IEEE Transactions on Electron devices 59 (12), 3243-3249, 2012
213 2012 Single-shot dynamics of spin–orbit torque and spin transfer torque switching in three-terminal magnetic tunnel junctions E Grimaldi, V Krizakova, G Sala, F Yasin, S Couet, GS Kar, K Garello, ...
Nature Nanotechnology 15 (2), 111-117, 2020
206 2020 Two-dimensional materials prospects for non-volatile spintronic memories H Yang, SO Valenzuela, M Chshiev, S Couet, B Dieny, B Dlubak, A Fert, ...
Nature 606 (7915), 663-673, 2022
164 2022 SOT-MRAM 300mm integration for low power and ultrafast embedded memories K Garello, F Yasin, S Couet, L Souriau, J Swerts, S Rao, S Van Beek, ...
2018 IEEE Symposium on VLSI Circuits, 81-82, 2018
158 2018 Manufacturable 300mm platform solution for Field-Free Switching SOT-MRAM K Garello, F Yasin, H Hody, S Couet, L Souriau, SH Sharifi, J Swerts, ...
2019 Symposium on VLSI Circuits, T194-T195, 2019
145 2019 Improvement of data retention in HfO2 /Hf 1T1R RRAM cell under low operating current YY Chen, M Komura, R Degraeve, B Govoreanu, L Goux, A Fantini, ...
2013 IEEE International Electron Devices Meeting, 10.1. 1-10.1. 4, 2013
140 2013 Dynamic ‘hour glass’ model for SET and RESET in HfO2 RRAM R Degraeve, A Fantini, S Clima, B Govoreanu, L Goux, YY Chen, ...
2012 Symposium on VLSI Technology (VLSIT), 75-76, 2012
119 2012 Kinetic evolution and equilibrium morphology of strained islands A Rastelli, M Stoffel, J Tersoff, GS Kar, OG Schmidt
Physical review letters 95 (2), 026103, 2005
117 2005 Understanding of the endurance failure in scaled HfO2 -based 1T1R RRAM through vacancy mobility degradation YY Chen, R Degraeve, S Clima, B Govoreanu, L Goux, A Fantini, GS Kar, ...
2012 International Electron Devices Meeting, 20.3. 1-20.3. 4, 2012
110 2012 Ultralow sub-500nA operating current high-performance TiN\Al2 O3 \HfO2 \Hf\TiN bipolar RRAM achieved through understanding-based stack-engineering L Goux, A Fantini, G Kar, YY Chen, N Jossart, R Degraeve, S Clima, ...
2012 Symposium on VLSI Technology (VLSIT), 159-160, 2012
90 2012 Intrinsic switching behavior in HfO2 RRAM by fast electrical measurements on novel 2R test structures A Fantini, DJ Wouters, R Degraeve, L Goux, L Pantisano, G Kar, YY Chen, ...
2012 4th IEEE International Memory Workshop, 1-4, 2012
90 2012 Capacitor-less, long-retention (> 400s) DRAM cell paving the way towards low-power and high-density monolithic 3D DRAM A Belmonte, H Oh, N Rassoul, GL Donadio, J Mitard, H Dekkers, ...
2020 IEEE International Electron Devices Meeting (IEDM), 28.2. 1-28.2. 4, 2020
84 2020 Charge storage and photoluminescence characteristics of silicon oxide embedded Ge nanocrystal trilayer structures K Das, M NandaGoswami, R Mahapatra, GS Kar, A Dhar, HN Acharya, ...
Applied physics letters 84 (8), 1386-1388, 2004
78 2004 Analysis of complementary RRAM switching DJ Wouters, L Zhang, A Fantini, R Degraeve, L Goux, YY Chen, ...
IEEE Electron Device Letters 33 (8), 1186-1188, 2012
77 2012 Enablement of STT-MRAM as last level cache for the high performance computing domain at the 5nm node S Sakhare, M Perumkunnil, TH Bao, S Rao, W Kim, D Crotti, F Yasin, ...
2018 IEEE International Electron Devices Meeting (IEDM), 18.3. 1-18.3. 4, 2018
69 2018