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Ali Asgar Sohanghpurwala
Ali Asgar Sohanghpurwala
PhD. Candidate, Virginia Tech
Verified email at vt.edu
Title
Cited by
Cited by
Year
OpenPR: An open-source partial-reconfiguration toolkit for Xilinx FPGAs
AA Sohanghpurwala, P Athanas, T Frangieh, A Wood
2011 IEEE International Symposium on Parallel and Distributed Processing …, 2011
932011
Hardware accelerated SAT solvers—A survey
AA Sohanghpurwala, MW Hassan, P Athanas
Journal of Parallel and Distributed Computing 106, 170-184, 2017
482017
Optical replacement of pH electrode
A Sohanghpurwala, G Rao, Y Kostov
IEEE Sensors Journal 9 (3), 219-220, 2009
192009
Private verification for FPGA bitstreams
JP Graf, AAAA Sohanghpurwala, SJ Harper
US Patent 10,902,132, 2021
132021
An effective probability distribution SAT solver on reconfigurable hardware
AA Sohanghpurwala, P Athanas
2016 International Conference on ReConFigurable Computing and FPGAs …, 2016
82016
Verification of bitstreams
JP Graf, AAAA Sohanghpurwala, SJ Harper
US Patent 11,531,773, 2022
62022
OpenPR: An Open-Source Partial Reconfiguration Tool-Kit for Xilinx FPGAs
AAAA Sohanghpurwala
Virginia Tech, 2010
52010
Private Verification for FPGA Bitstreams
J Graf, AA Sohanghpurwala
GOMACTech 2017 Proceedings, 2017
32017
A device-agnostic tool for precomputing legal placements in modular design flows
AA Sohanghpurwala, P Athanas, A Love
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
12014
Computer technology to ensure an electronic design automation (eda) implementation for electronic circuitry is traceable, auditable, and reproducible
AA Sohanghpurwala, S Harper, J Graf, C Fraley, A Cook, T Dunham
US Patent App. 17/950,341, 2023
2023
Exploits in Concurrency for Boolean Satisfiability
AAAA Sohanghpurwala
Virginia Tech, 2018
2018
Technical demonstrations session
S Gao, J Watson, HA Andrade, S Skalicky, AG Schmidt, EGT Bostelmann, ...
2014 International Conference on ReConFigurable Computing and FPGAs …, 2014
2014
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