Approaches for reducing power consumption of the high-resolution pipelined analog-to-digital converters AV Sidun, IM Piatak 2018 IEEE Conference of Russian Young Researchers in Electrical and …, 2018 | 10 | 2018 |
A 6-bit CMOS inverter based pseudo-flash ADC with low power consumption DV Morozov, MM Pilipko, IM Piatak East-West Design & Test Symposium (EWDTS 2013), 1-4, 2013 | 8 | 2013 |
An inverter-based 6-bit Pipelined ADC with low power consumption I Piatak, D Morozov, J Hauer Eurocon 2013, 1951-1954, 2013 | 8 | 2013 |
Design of the integrated temperature stabilization system YV Belyaev, MS Gaidukov, AV Sidun, IS Smirnov, IM Piatak 2019 IEEE Conference of Russian Young Researchers in Electrical and …, 2019 | 5 | 2019 |
Error Calculation for Accelerometer Calibration by Broadband Random Vibration Analysis Y Belyaev, V Yurchenko, I Piatak 2021 IEEE Conference of Russian Young Researchers in Electrical and …, 2021 | 4 | 2021 |
Design of the ring amplifier for low-power ADC A Sidun, M Gaidukov, I Piatak, Y Belyaev 2018 IEEE International Conference on Electrical Engineering and Photonics …, 2018 | 4 | 2018 |
Design considerations for pipelined ADCs I Piatak, M Pilipko, D Morozov 2016 IEEE NW Russia Young Researchers in Electrical and Electronic …, 2016 | 4 | 2016 |
A 14-bit 50-MS/s pipelined analog-to-digital converter with digital error calibration I Piatak, M Pilipko, D Morozov 2015 International Siberian Conference on Control and Communications (SIBCON …, 2015 | 4 | 2015 |
The effect from finite DC gain and gain-bandwidth of an Op-amp on pipelined analog-to-digital converter errors A Korotkov, I Piatak Indian Journal of Science and Technology, 2016 | 3 | 2016 |
Realization of Foreground Calibration and Correction of Pipelined ADC Based on 2.5-bit Stages VA Yurchenko, IM Piatak 2022 Conference of Russian Young Researchers in Electrical and Electronic …, 2022 | 2 | 2022 |
Digitally assisted low-power pipelined analog-to-digital converters I Piatak, D Morozov, M Pilipko 2015 IEEE NW Russia Young Researchers in Electrical and Electronic …, 2015 | 1 | 2015 |
Inverter-Based Pseudo-Flash ADC with Low Power Consumption DV Morozov, MM Pilipko, IM Piatak Ïðîáëåìû ðàçðàáîòêè ïåðñïåêòèâíûõ ìèêðî-è íàíîýëåêòðîííûõ ñèñòåì (ÌÝÑ), 8-8, 2015 | 1 | 2015 |
Open-Source and Non-Commercial Software for Digital ASIC Design IM Piatak, VA Antropov, OT de Laubenque, VA Yurchenko 2023 International Conference on Electrical Engineering and Photonics …, 2023 | | 2023 |
Modeling the impact of technological process variations on R-2R DAC static characteristics EA Salonina, IM Piatak Èíôîðìàòèêà, òåëåêîììóíèêàöèè è óïðàâëåíèå 13 (3), 55-62, 2020 | | 2020 |
A 14-bit 100 MS/s Pipelined ADC IM Piatak, DV Morozov, MM Pilipko Ïðîáëåìû ðàçðàáîòêè ïåðñïåêòèâíûõ ìèêðî-è íàíîýëåêòðîííûõ ñèñòåì (ÌÝÑ), 13-16, 2017 | | 2017 |
Linearization of the analog-to-digital converter for an FPGA-based direct digital receiver M Krneta, IM Piatak Èíôîðìàòèêà, òåëåêîììóíèêàöèè è óïðàâëåíèå 10 (3), 44-52, 2017 | | 2017 |
DESIGN OF THE DIGITAL LOGIC CIRCUITS USING FPGA M Krneta, IM Piatak Íåäåëÿ íàóêè ÑÏáÏÓ, 127-130, 2016 | | 2016 |
Section 1. Circuits & Systems for Telecommunications P Zahradnik, HMR Al-Khafaji, HS Majdi, OV Dvornikov, VL Dziatlau, ... | | |