| Optimum wire sizing of RLC interconnect with repeaters MA El-Moursy, EG Friedman Proceedings of the 13th ACM Great Lakes symposium on VLSI, 27-32, 2003 | 91 | 2003 |
| Traffic signs detection and recognition system using deep learning MM William, PS Zaki, BK Soliman, KG Alexsan, M Mansour, M El-Moursy, ... 2019 Ninth international conference on intelligent computing and information …, 2019 | 77 | 2019 |
| Power characteristics of inductive interconnect MA El-Moursy, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (12 …, 2004 | 50 | 2004 |
| FPGA-based electrocardiography (ECG) signal analysis system using least-square linear phase finite impulse response (FIR) filter MG Egila, MA El-Moursy, AE El-Hennawy, HA El-Simary, A Zaki Journal of Electrical Systems and Information Technology 3 (3), 513-526, 2016 | 47 | 2016 |
| Exponentially tapered H-tree clock distribution networks MA El-Moursy, EG Friedman IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (8), 971-975, 2005 | 44 | 2005 |
| Shielding effect of on-chip interconnect inductance MA El-Moursy, EG Friedman Proceedings of the 13th ACM Great Lakes symposium on VLSI, 165-170, 2003 | 33 | 2003 |
| Double logarithmic arithmetic technique for low-power 3-D graphics applications DM Ellaithy, MA El-Moursy, GH Ibrahim, A Zaki, A Zekry IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (7 …, 2017 | 26 | 2017 |
| A robust, real-time and calibration-free lane departure warning system I Gamal, A Badawy, AMW Al-Habal, MEK Adawy, KK Khalil, MA El-Moursy, ... Microprocessors and Microsystems 71, 102874, 2019 | 24 | 2019 |
| Inductive interconnect width optimization for low power MA El-Moursy, EG Friedman Proceedings of the 2003 International Symposium on Circuits and Systems …, 2003 | 21 | 2003 |
| High throughput architecture for high performance NoC MA El-Moursy, M Ismail 2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2241-2244, 2009 | 20 | 2009 |
| Wire shaping of RLC interconnects MA El-Moursy, EG Friedman Integration 40 (4), 461-472, 2007 | 20 | 2007 |
| CFPA: Congestion aware, fault tolerant and process variation aware adaptive routing algorithm for asynchronous Networks-on-Chip ST Muhammad, M Saad, AA El-Moursy, MA El-Moursy, HFA Hamed Journal of Parallel and Distributed Computing 128, 151-166, 2019 | 17 | 2019 |
| Traffic-based virtual channel activation for low-power NoC ST Muhammad, R Ezz-Eldin, MA El-Moursy, AA El-Moursy, AM Refaat IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (12 …, 2015 | 17 | 2015 |
| Process variation delay and congestion aware routing algorithm for asynchronous NoC design R Ezz-Eldin, MA El-Moursy, HFA Hamed IEEE Transactions on Very Large Scale Integration (VLSI) Systems 24 (3), 909-919, 2015 | 15 | 2015 |
| Optimizing inductive interconnect for low power MA El-Moursy, EG Friedman System-on-Chip for Real-Time Applications, 380-391, 2003 | 15 | 2003 |
| Energy adaptive convolution neural network using dynamic partial reconfiguration E Youssef, HA Elsemary, MA El-Moursy, A Khattab, H Mostafa 2020 IEEE 63rd International Midwest Symposium on Circuits and Systems …, 2020 | 14 | 2020 |
| Dual-channel multiplier for piecewise-polynomial function evaluation for low-power 3-D graphics DM Ellaithy, MA El-Moursy, A Zaki, A Zekry IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (4), 790-798, 2019 | 14 | 2019 |
| Optimization for traffic-based virtual channel activation low-power NoC ST Muhammad, MA El-Moursy, AA El-Moursy, AM Refaat 5th International Conference on Energy Aware Computing Systems …, 2015 | 13 | 2015 |
| High throughput architecture for OCTAGON network on chip MA El-Moursy, D Korzec, M Ismail 2009 16th IEEE international conference on electronics, circuits and systems …, 2009 | 13 | 2009 |
| Optimum wire shaping of an RLC interconnect MA El-Moursy, EG Friedman 2003 46th Midwest Symposium on Circuits and Systems 3, 1459-1464, 2003 | 13 | 2003 |
