| Energy-efficient machine learning accelerator for binary neural networks W Mao, Z Xiao, P Xu, H Ren, D Liu, S Zhao, F An, H Yu Proceedings of the 2020 on Great Lakes Symposium on VLSI, 77-82, 2020 | 12 | 2020 |
| DPU: DAG processing unit for irregular graphs with precision-scalable posit arithmetic in 28 nm N Shah, LIG Olascoaga, S Zhao, W Meert, M Verhelst IEEE Journal of Solid-State Circuits 57 (8), 2586-2596, 2021 | 9 | 2021 |
| 9.4 piu: A 248gops/w stream-based processor for irregular probabilistic inference networks using precision-scalable posit arithmetic in 28nm N Shah, LIG Olascoaga, S Zhao, W Meert, M Verhelst 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 150-152, 2021 | 9 | 2021 |
| A 307-fps 351.7-GOPs/W deep learning FPGA accelerator for real-time scene text recognition S Zhao, F An, H Yu 2019 International Conference on Field-Programmable Technology (ICFPT), 263-266, 2019 | 8 | 2019 |
| A reconfigurable multiple-precision floating-point dot product unit for high-performance computing W Mao, K Li, X Xie, S Zhao, H Li, H Yu 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2021 | 3 | 2021 |
| A 703.4-GOPs/W binary SegNet processor with computing-near-memory architecture for road detection H Lyu, F An, S Zhao, W Mao, H Yu IEEE Design & Test 39 (2), 74-83, 2020 | 2 | 2020 |
| Discrete samplers for approximate inference in probabilistic machine learning S Zhao, N Shah, W Meert, M Verhelst 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2022 | 1 | 2022 |
| AI Accelerator Circuits IMCA: An Efficient In-Memory Convolution Accelerator.............. HE Yantır, AM Eltawil, and KN Salama 447 High-Utilization, High-Flexibility Depth … S Colleman, M Verhelst, D Xu, Z Zhu, C Liu, Y Wang, S Zhao, L Zhang, ... | | |
Marian VerhelstMicas - ESAT - KU Leuven, BelgiumVerified email at esat.kuleuven.be
