Dr. Soumen Mallick
Dr. Soumen Mallick
Asistant Professor, Dept. of AEIE, Dr. B. C. Roy Engineering College, Durgapur, West Bengal, India
Подтвержден адрес электронной почты в домене bcrec.ac.in
Название
Процитировано
Процитировано
Год
Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization
S Mallick, R Kar, D Mandal, SP Ghoshal
International Journal of Machine Learning and Cybernetics (IJMLC) 8 (1), 309-331, 2015
582015
CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution
S Mallick, R Kar, D Mandal, SP Ghoshal
Journal of Experimental & Theoretical Artificial Intelligence 28 (4), 719-749, 2015
202015
Optimal sizing and design of CMOS analogue amplifier circuits using craziness-based particle swarm optimization
S Mallick, R Kar, SP Ghoshal, D Mandal
International Journal of Numerical Modelling: Electronic Networks, Devices …, 2016
112016
Optimal design of 5.5 GHz CMOS LNA using hybrid fitness based adaptive De with PSO
S Mallick, JR Akhil, A Dasgupta, R Kar, D Mandal, SP Ghoshal
2017 International Electrical Engineering Congress (IEECON), 1-4, 2017
42017
CMOS analog amplifier circuit sizing using opposition based harmony search algorithm
S Mallick, K Sudhakar, R Kar, D Mandal, SP Ghoshal
Communication and Signal Processing (ICCSP), 2016 International Conference …, 2016
32016
Optimal Design of 2.4 GHz CMOS LNA Using PSO with Aging Leader and Challenger
S Mallick, K Sudhakar, R Kar, D Mandal, SP Ghoshal
Advances in Computer Communication and Computational Sciences, Proceedings …, 2018
2018
Sizing of two stage Op-Amp using OHS algorithm
S Mallick, K Suman, R Kar, D Mandal, SP Ghoshal
2017 International Electrical Engineering Congress (iEECON), 1-4, 2017
2017
SEOA-based optimal design of analogue CMOS amplifier circuits
S Mallick, R Kar, SP Ghoshal, D Mandal
International Journal of Bio-Inspired Computation (IJBIC) 9 (4), 211-225, 2017
2017
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