Ahmed Shalash
Ahmed Shalash
Professor, Cairo University
Verified email at ieee.org
Title
Cited by
Cited by
Year
Multidimensional carrierless AM/PM systems for digital subscriber loops
AF Shalash, KK Parhi
IEEE Transactions on Communications 47 (11), 1655-1667, 1999
801999
Adaptive transmitter for digital transmission
H Takatori, AF Shalash
US Patent 6,229,855, 2001
442001
Revisiting active cancellation carriers for shaping the spectrum of OFDM-based cognitive radios
MS El-Saadany, AF Shalash, M Abdallah
2009 IEEE Sarnoff Symposium, 1-5, 2009
412009
Comparison of discrete multitone and carrierless AM/PM techniques for line equalization
A Shalash, KK Parhi
1996 IEEE International Symposium on Circuits and Systems. Circuits and …, 1996
351996
Automatic gain control circuit
AF Shalash
US Patent 7,570,934, 2009
212009
Design guidelines for the high-speed dynamic partial reconfiguration based software defined radio implementations on Xilinx Zynq FPGA
A Kamaleldin, A Mohamed, A Nagy, Y Gamal, A Shalash, Y Ismail, ...
2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017
172017
Power efficient folding of pipelined LMS adaptive filters with applications to wireline digital communications
AF Shalash, KK Parhi
Journal of VLSI signal processing systems for signal, image and video …, 2000
172000
Three-dimensional carrierless AM/PM line code for the unshielded twisted pair cables
A Shalash, KK Parhi
1997 IEEE International Symposium on Circuits and Systems (ISCAS) 3, 2136-2139, 1997
171997
Improved synchronization, channel estimation, and simplified LDPC decoding for the physical layer of the DVB-T2 receiver
DH Sayed, M Elsabrouty, AF Shalash
EURASIP Journal on Wireless Communications and Networking 2013 (1), 1-16, 2013
132013
A reconfigurable hardware platform implementation for software defined radio using dynamic partial reconfiguration on Xilinx Zynq FPGA
A Kamaleldin, S Hosny, K Mohamed, M Gamal, A Hussien, E Elnader, ...
2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017
122017
Implementation of a reconfigurable ASIP for high throughput low power DFT/DCT/FIR engine
HM Hassan, K Mohammed, AF Shalash
EURASIP Journal on Embedded Systems 2012 (1), 1-18, 2012
122012
Programmable engine core for executing digital signal processing functions
M Hennedy, A Shalash
US Patent 7,698,354, 2010
122010
A reconfigurable baseband processor for wireless OFDM synchronization sub-system
M Abdelall, AF Shalash, HAH Fahmy
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2385-2388, 2011
92011
Modifications on RSA cryptosystem using genetic optimization
AKS Hassan, AF Shalash, NF Saudy
International Journal of Research and Reviews in Applied Sciences 19 (2), 150, 2014
82014
A cost-effective dynamic partial reconfiguration implementation flow for Xilinx FPGA
A Kamaleldin, I Ahmed, AM Obeid, A Shalash, Y Ismail, H Mostafa
2017 New Generation of CAS (NGCAS), 281-284, 2017
72017
FPGA Implementation of an ASIP for high throughput DFT/DCT 1D/2D engine
HM Hassan, AF Shalash, K Mohamed
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 1255-1258, 2011
72011
ASIP design of a reconfigurable channel estimator for OFDM systems
M Hamdy, OA Nasr, AF Shalash
ICM 2011 Proceeding, 1-5, 2011
62011
Memory conflict analysis for a multi-standard, reconfigurable turbo decoder
EM Abdel-Hamid, HAH Fahmy, MM Khairy, AF Shalash
2011 IEEE International Symposium of Circuits and Systems (ISCAS), 2701-2704, 2011
62011
Interference mitigation using multi-BS precoding with UL sounding
M Abdelaziz, M Nassar, M Abdallah, M Nafie, M Khairy, Y Fahmy, ...
IEEE C80216m-09_1072r3, 2009
62009
Design and implementation of application‐specific instruction‐set processor design for high‐throughput multi‐standard wireless orthogonal frequency division multiplexing …
M Abdel All, HM Hassan, M Hamdy, OA Nasr, K Mohamed, AF Shalash
IET Circuits, Devices & Systems 9 (3), 191-203, 2015
42015
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Articles 1–20