| Parallel scalability of video decoders C Meenderinck, A Azevedo, B Juurlink, MA Mesa, A Ramirez Journal of Signal Processing Systems 57 (2), 173-194, 2009 | 127 | 2009 |
| Virtual execution platforms for mixed-time-criticality systems: The CompSOC architecture and design flow K Goossens, A Azevedo, K Chandrasekar, MD Gomony, S Goossens, ... ACM SIGBED Review 10 (3), 23-34, 2013 | 119 | 2013 |
| Virtual Execution Platforms for Mixed-Time-Criticality Systems: The CompSOC Architecture and Design Flow K Goossens, A Azevedo, K Chandrasekar, MD Gomony, S Goossens, ... | 119* | |
| Parallel H. 264 decoding on an embedded multicore processor A Azevedo, C Meenderinck, B Juurlink, A Terechko, J Hoogerbrugge, ... High Performance Embedded Architectures and Compilers, 404-418, 2009 | 76 | 2009 |
| The SARC architecture A Ramirez, F Cabarcas, B Juurlink, M Alvarez Mesa, F Sanchez, ... Micro, IEEE 30 (5), 16-29, 2010 | 75 | 2010 |
| The SARC Architecture (HTML) A Ramirez, F Cabarcas, B Juurlink, MA Mesa, F Sanchez, A Azevedo, ... | 75* | 2010 |
| Parallel scalability of H. 264 C Meenderinck, A Azevedo, M Alvarez, B Juurlink, A Ramirez Proceedings of the first Workshop on Programmability Issues for Multi-Core …, 2008 | 67 | 2008 |
| Scalability of Macroblock-level parallelism for H. 264 decoding MA Mesa, A Ramírez, A Azevedo, C Meenderinck, B Juurlink, M Valero Parallel and Distributed Systems (ICPADS), 2009 15th International …, 2009 | 65 | 2009 |
| Scalable parallel programming applied to H. 264/AVC decoding CC Chi, A Azevedo, C Meenderinck, A Ramírez Springer, 2012 | 28* | 2012 |
| When reconfigurable architecture meets network-on-chip R Soares, IS Silva, A Azevedo Proceedings of the 17th symposium on Integrated circuits and system design …, 2004 | 28 | 2004 |
| Memory hierarchy targeting bi-predictive motion compensation for H. 264/AVC decoder B Zatt, A Azevedo, L Agostini, A Susin, S Bampi VLSI, 2007. ISVLSI'07. IEEE Computer Society Annual Symposium on, 445-446, 2007 | 26 | 2007 |
| Design and FPGA prototyping of a H: 264/AVC main profile decoder for HDTV LV Agostini, AP Azevedo Filho, WT Staehler, VS Rosa, B Zatt, ACM Pinto, ... Journal of the Brazilian Computer Society 12 (4), 25-36, 2007 | 25 | 2007 |
| International Parallel and Distributed Processing Symposium (IPDPS'03) R Soares, A Azevedo, IS Silva | 21* | 2003 |
| Analysis of video filtering on the cell processor A Azevedo, C Meenderinck, B Juurlink, M Alvarez, A Ramirez Circuits and Systems, 2008. ISCAS 2008. IEEE International Symposium on, 488-491, 2008 | 20 | 2008 |
| FPGA design of a H. 264/AVC main profile decoder for HDTV LV Agostini, AP Azevedo Filho, VS Rosa, EA Berriel, TGS Santos, ... Field Programmable Logic and Applications, 2006. FPL'06. International …, 2006 | 19 | 2006 |
| MoCHA: a bi-predictive motion compensation hardware for H. 264/AVC decoder targeting HDTV A Azevedo, B Zatt, L Agostini, S Bampi Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on …, 2007 | 17 | 2007 |
| Performance evaluation of macroblock-level parallelization of H. 264 decoding on a cc-NUMA multiprocessor architecture M Alvarez Mesa, A Ramírez, M Valero, A Azevedo, C Meenderinck, ... Avances en Sistemas e Informática 6 (1), 219-228, 2009 | 16 | 2009 |
| X4CP32: A coarse grain general purpose reconfigurable microprocessor R Soares, A Azevedo, IS Silva Parallel and Distributed Processing Symposium, 2003. Proceedings …, 2003 | 13 | 2003 |
| A highly scalable parallel implementation of H. 264 A Azevedo, B Juurlink, C Meenderinck, A Terechko, J Hoogerbrugge, ... Transactions on High-Performance Embedded Architectures and Compilers IV …, 2011 | 12 | 2011 |
| An efficient software cache for H. 264 motion compensation A Azevedo, B Juurlink System-on-Chip, 2009. SOC 2009. International Symposium on, 147-150, 2009 | 12 | 2009 |
Ben JuurlinkTU BerlinVerified email at tu-berlin.de
