Ofer Shacham
Ofer Shacham
Facebook Inc. (Previously Google and Stanford)
Verified email at alumni.stanford.edu
Cited by
Cited by
Convolution engine: balancing efficiency & flexibility in specialized computing
W Qadeer, R Hameed, O Shacham, P Venkatesan, C Kozyrakis, ...
Proceedings of the 40th Annual International Symposium on Computer …, 2013
CPU DB: Recording Microprocessor History
MH Andrew Danowitz, Kyle Kelley, James Mao, John P
Queue 10 (4), 10, 2012
CPU DB: Recording Microprocessor History
MH Andrew Danowitz, Kyle Kelley, James Mao, John P
Communications of the ACM 55 (4), 55-63, 2012
Rethinking digital design: Why design must change
O Shacham, O Azizi, M Wachs, W Qadeer, Z Asgar, K Kelley, ...
IEEE micro 30 (6), 9-24, 2010
Years of microprocessor trend data
K Rupp, M Horovitz, F Labonte, O Shacham, K Olukotun, L Hammond, ...
by karlrupp. net.[Online, 42
Chip multiprocessor generator: automatic generation of custom and heterogeneous compute platforms
O Shacham
Stanford University, 2011
Virtual linebuffers for image signal processors
Q Zhu, O Shacham, JR Redgrave, DF Finchelstein, A Meixner
US Patent 9,749,548, 2017
Avoiding game over: Bringing design to the next level
O Shacham, S Galal, S Sankaranarayanan, M Wachs, J Brunhaver, ...
DAC Design Automation Conference 2012, 623-629, 2012
Design automation framework for application-specific logic-in-memory blocks
Q Zhu, K Vaidyanathan, O Shacham, M Horowitz, L Pileggi, F Franchetti
2012 IEEE 23rd International Conference on Application-Specific Systems …, 2012
A memory system design framework: creating smart memories
A Firoozshahian, A Solomatnikov, O Shacham, Z Asgar, S Richardson, ...
Proceedings of the 36th annual international symposium on Computer …, 2009
Architecture for high performance, power efficient, programmable image processing
Q Zhu, O Shacham, A Meixner, JR Redgrave, DF Finchelstein, ...
US Patent 9,965,824, 2018
FPU generator for design space exploration
S Galal, O Shacham, JS Brunhaver II, J Pu, A Vassiliev, M Horowitz
2013 IEEE 21st Symposium on Computer Arithmetic, 25-34, 2013
Verification of chip multiprocessor memory systems using a relaxed scoreboard
O Shacham, M Wachs, A Solomatnikov, A Firoozshahian, S Richardson, ...
2008 41st IEEE/ACM International Symposium on Microarchitecture, 294-305, 2008
Line buffer unit for image processor
N Desai, A Meixner, Q Zhu, JR Redgrave, O Shacham, DF Finchelstein
US Patent 9,756,268, 2017
Chip multi-processor generator
A Solomatnikov, A Firoozshahian, W Qadeer, O Shacham, K Kelley, ...
Proceedings of the 44th Annual Design Automation Conference, 262-263, 2007
Two dimensional shift array for image processor
O Shacham, JR Redgrave, A Meixner, Q Zhu, DF Finchelstein, ...
US Patent 9,769,356, 2017
Sheet generator for image processor
A Meixner, JR Redgrave, O Shacham, Q Zhu, DF Finchelstein
US Patent 10,291,813, 2019
Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure
A Meixner, O Shacham, D Patterson, DF Finchelstein, Q Zhu, ...
US Patent 10,095,479, 2018
Energy efficient processor core architecture for image processor
A Meixner, JR Redgrave, O Shacham, DF Finchelstein, Q Zhu
US Patent 9,772,852, 2017
System and method for a chip generator
O Shacham, M Horowitz, S Richardson
US Patent 8,966,413, 2015
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