| High-level modeling and testing of multiple control faults in digital systems A Jasnetski, SA Oyeniran, A Tsertov, M Schölzel, R Ubar 2016 IEEE 19th International Symposium on Design and Diagnostics of …, 2016 | 15 | 2016 |
| On automatic software-based self-test program generation based on high-level decision diagrams A Jasnetski, R Ubar, A Tsertov 2016 17th Latin-American Test Symposium (LATS), 177-177, 2016 | 11 | 2016 |
| Software-based self-test generation for microprocessors with high-level decision diagrams R Ubar, A Tsertov, A Jasnetski, M Brik 2014 15th Latin American Test Workshop-LATW, 1-6, 2014 | 11 | 2014 |
| Software-based self-test generation for microprocessors with high-level decision diagrams A Jasnetski, R Ubar, A Tsertov, M Brik Proceedings of the Estonian Academy of Sciences 63 (1), 48, 2014 | 9 | 2014 |
| Automated software-based self-test generation for microprocessors A Jasnetski, R Ubar, A Tsertov 2017 MIXDES-24th International Conference" Mixed Design of Integrated …, 2017 | 8 | 2017 |
| New fault models and self-test generation for microprocessors using high-level decision diagrams A Jasnetski, J Raik, A Tsertov, R Ubar 2015 IEEE 18th International Symposium on Design and Diagnostics of …, 2015 | 7 | 2015 |
| High-level test data generation for software-based self-test in microprocessors AS Oyeniran, A Jasnetski, A Tsertov, R Ubar 2017 6th Mediterranean Conference on Embedded Computing (MECO), 1-6, 2017 | 3 | 2017 |
| Laboratory framework team for investigating the dependability issues of microprocessor systems A Jasnetski, R Ubar, A Tsertov, H Kruus 10th European Workshop on Microelectronics Education (EWME), 80-83, 2014 | 2 | 2014 |
| Automated software-based in-field self-test program synthesis A Jasnetski, R Ubar, A Tsertov International Journal of Microelectronics and Computer Science 8 (2), 2017 | | 2017 |
| LABORATORIAL OPERATING INSTRUCTIONS FOR TEST PROGRAMME DESIGN USING PARWAN MICROPROCESSOR RJ Ubar, A Jasnetski | | 2015 |
| In-system programming of non-volatile memories on microprocessor-centric boards A Tsertov, S Devadze, A Jutman, A Jasnetski International Journal of Microelectronics and Computer Science 5 (1), 25-34, 2014 | | 2014 |
| On in-system programming of non-volatile memories A Tsertov, S Devadze, A Jutman, A Jasnetski Proceedings of the 20th International Conference Mixed Design of Integrated …, 2013 | | 2013 |
| ISSN 1736-7530 (electronic) ISSN 1736-6046 (print) Formerly: Proceedings of the Estonian Academy of Sciences, series Physics & Mathematics and Chemistry Published since 1952 AB Verbitsky, Y Vertsimakha, S Studzinski, S Bereznev, I Golovtsov, ... | | |
| Reconfigurable FPGA-based non-intrusive BERT demonstrator S Odintsov, A Jasnetski | | |
| of the estonian academy of sciences A Jasnetski, R Ubar, A Tsertov, M Brik | | |
| Software-based self-test generation for microprocessors with high-level decision diagrams; pp. 48–61 M Brik, A Jasnetski, A Tsertov, R Ubar | | |
| CONTROL SYSTEMS V Kaparin, Ü Kotta, M Wyrwas, M Rahula, P Vašík, J Kikas, I Rebane, ... | | |
| DECISION DIAGRAMS DRIVEN TEST GENERATION FOR MICROPROCESSORS R Ubar, A Jasnetski, A Tsertov ББК 22.17 И74 Редколлегия: РТ Якупов, д-р физ.-мат. наук, профессор; АА …, 0 | | |
| ISSN 1736-7530 (electronic) ISSN 1736-6046 (print) Formerly: Proceedings of the Estonian Academy of Sciences, series Physics & Mathematics and Chemistry Published since 1952 G Singer, D Danilov, U Norbisrath | | |
