| Generalized low-error area-efficient fixed-width multipliers LD Van, CC Yang IEEE Transactions on Circuits and Systems I: Regular Papers 52 (8), 1608-1619, 2005 | 181 | 2005 |
| Design of the lower error fixed-width multiplier and its application LD Van, SS Wang, WS Feng IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2000 | 156 | 2000 |
| An efficient systolic architecture for the DLMS adaptive filter and its applications LD Van, WS Feng IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2001 | 120 | 2001 |
| Power-efficient pipelined reconfigurable fixed-width Baugh-Wooley multipliers JH Tu, LD Van IEEE transactions on computers 58 (10), 1346-1355, 2009 | 70 | 2009 |
| Adaptive low-error fixed-width Booth multipliers MA Song, LD Van, SY Kuo IEICE Transactions on Fundamentals of Electronics, Communications and …, 2007 | 70 | 2007 |
| Energy-efficient FastICA implementation for biomedical signal separation LD Van, DY Wu, CS Chen IEEE Transactions on Neural Networks 22 (11), 1809-1822, 2011 | 68 | 2011 |
| A low-power 64-point FFT/IFFT design for IEEE 802.11 a WLAN application CT Lin, YC Yu, LD Van 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-4526, 2006 | 67 | 2006 |
| A 2.4-GHz CMOS down-conversion doubly balanced mixer with low supply voltage CC Tang, WS Lu, LD Van, WS Feng ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 60 | 2001 |
| Front-end amplifier of low-noise and tunable BW/gain for portable biomedical signal acquisition CC Huang, SH Hung, JF Chung, LD Van, CT Lin 2008 IEEE International Symposium on Circuits and Systems (ISCAS), 2717-2720, 2008 | 51 | 2008 |
| FPGA implementation of 4-channel ICA for on-line EEG signal separation WC Huang, SH Hung, JF Chung, MH Chang, LD Van, CT Lin 2008 IEEE Biomedical Circuits and Systems Conference, 65-68, 2008 | 43 | 2008 |
| Cost-effective triple-mode reconfigurable pipeline FFT/IFFT/2-D DCT processor CT Lin, YC Yu, LD Van IEEE transactions on very large scale integration (VLSI) systems 16 (8 …, 2008 | 43 | 2008 |
| Analyzing students' attention in class using wearable devices X Zhang, CW Wu, P Fournier-Viger, LD Van, YC Tseng 2017 IEEE 18th international symposium on a world of wireless, mobile and …, 2017 | 37 | 2017 |
| Power-efficient and cost-effective 2-D symmetry filter architectures PY Chen, LD Van, IH Khoo, HC Reddy, CT Lin IEEE Transactions on Circuits and Systems I: Regular Papers 58 (1), 112-125, 2010 | 35 | 2010 |
| PlantTalk: A smartphone-based intelligent hydroponic plant box LD Van, YB Lin, TH Wu, YW Lin, SR Peng, LH Kao, CH Chang Sensors 19 (8), 1763, 2019 | 33 | 2019 |
| A 0.5 V 1KS/s 2.5 nW 8.52-ENOB 6.8 fJ/conversion-step SAR ADC for biomedical applications TC Lu, LD Van, CS Lin, CM Huang 2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2011 | 32 | 2011 |
| A new 2-D systolic digital filter architecture without global broadcast LD Van IEEE transactions on very large scale integration (VLSI) systems 10 (4), 477-486, 2002 | 31 | 2002 |
| Hardware-efficient architecture design of adaptive visible watermarking YC Fan, LD Van, CM Huang, HW Tsao Proceedings of the Ninth International Symposium on Consumer Electronics …, 2005 | 23 | 2005 |
| Things in the air: tagging wearable IoT information on drone videos LD Van, LY Zhang, CH Chang, KL Tong, KR Wu, YC Tseng Discover Internet of Things 1, 1-13, 2021 | 22 | 2021 |
| VLSI architecture for the low-computation cycle and power-efficient recursive DFT/IDFT design LD Van, CT Lin, YC Yu IEICE transactions on fundamentals of electronics, communications and …, 2007 | 20 | 2007 |
| High-speed area-efficient recursive DFT/IDFT architectures LD Van, CC Yang 2004 IEEE International Symposium on Circuits and Systems (ISCAS) 3, III-357, 2004 | 19 | 2004 |
