| Method and system for traffic metering to limit a received packet rate CF Dumitrescu, A Chilikin, P Laurent, KB Ramia, S Tangeda US Patent 9,450,881, 2016 | 71 | 2016 |
| Packet flow classification CFF Dumitrescu, NN Venkatesan, P Laurent, B Richardson US Patent 9,769,290, 2017 | 26 | 2017 |
| Design patterns for packet processing applications on multi-core intel architecture processors CF Dumitrescu Intel Design Center, https://www.intel.com/content/dam/www/public/us/en …, 2008 | 9 | 2008 |
| Hash table design and optimization for software virtual switches Y Wang, S Gobriel, R Wang, TYC Tai, C Dumitrescu Proceedings of the 2018 Afternoon Workshop on Kernel Bypassing Networks, 22-28, 2018 | 7 | 2018 |
| Technologies for network path and topology management A Srivastava, KA Doshi, CF Dumitrescu, C Maciocco US Patent App. 17/561,225, 2022 | 3 | 2022 |
| Technologies for a least recently used cache replacement policy using vector instructions R Wang, Y Wang, TY Tai, CF Dumitrescu, X Guo US Patent 10,789,176, 2020 | 3 | 2020 |
| Traffic management CF Dumitrescu, A Chilikin, P Laurent, KB Ramia, S Tangeda US Patent 10,158,578, 2018 | 3 | 2018 |
| Integrales Biot Savart Laplace C Dumitrescu, C Udriste, C Radu, A Zlatescu Tensor 54, 196, 1993 | 3 | 1993 |
| Power QUICC™ II pro family of communications processors: a broad range of advanced functionality in IP convergence C Dumitrescu, V Ciocoi, M Pop WSEAS Transactions on Electronics 3 (6), 330, 2006 | 2 | 2006 |
| Packet flow classification CFF Dumitrescu, NN Venkatesan, P Laurent, B Richardson US Patent 10,455,063, 2019 | | 2019 |
| Mapping application functional blocks to multi-core processors CF Dumitrescu, J Singh, P Lu US Patent 10,354,033, 2019 | | 2019 |
| Traffic management CF Dumitrescu, A Chilikin, P Laurent, KB Ramia, S Tangeda US Patent 10,091,122, 2018 | | 2018 |
| Programmable Systems-on-a-Chip (SoCs) for Networking Applications. PhD Dissertation. C Dumitrescu University Politehnica of Bucharest, https://www.slideshare.net/slideshow …, 2011 | | 2011 |
| DESIGN PRINCIPLES FOR BUILDING NETWORKING APPLICATIONS USING GENERAL PURPOSE MULTICORE PROCESSORS AND PACKET PROCESSING ACCELERATORS CF Dumitrescu University" Politehnica" of Bucharest Scientific Bulletin, Series C …, 2011 | | 2011 |
| Looking for the Lost Packets. Techniques for Debugging Packet Processing Systems based on Multi-core Intel Architecture Processors CF Dumitrescu Intel Design Center, https://www.intel.cn/content/dam/www/public/us/en …, 2009 | | 2009 |
| Testing Packet Processing Systems CD Mircea Ioan Pop, Ştefan A. Popa South East European Software Testing Conference (SEETEST), 2008 | | 2008 |
| NodeB Enablement on the Freescale MPC8360E Communications C Dumitrescu GSPx 2006 Global Signal Processing Conference, 2006 | | 2006 |
| ATM to Ethernet Interworking on the QUICC Engine Platform CD Tiberiu Petrică, Ovidiu Zainea, Ştefan A. Popa International Academy, Research and Industry Association (IARIA) ICCGI 2006, 2006 | | 2006 |
