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Lukas Valek
Lukas Valek
ON Semiconductor Czech Republic
Подтвержден адрес электронной почты в домене onsemi.com
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Процитировано
Процитировано
Год
Morphology and growth kinetics of organic thin films deposited by hot wall epitaxy on KCl substrates
A Andreev, T Haber, DM Smilgies, R Resel, H Sitter, NS Sariciftci, L Valek
Journal of Crystal Growth 275 (1), e2037-e2042, 2005
242005
Defect engineering during Czochralski crystal growth and silicon wafer manufacturing
L Válek, J Šik
Modern Aspects of Bulk Crystal and Thin Film Preparation, 34-71, 2012
202012
OISF pattern and grown-in precipitates in heavily boron doped silicon
L Válek, D Lysáček, J Šik
Journal of The Electrochemical Society 154 (10), H904, 2007
142007
Method of forming a gettering structure having reduced warpage and gettering a semiconductor wafer therewith
D Lysacek, J Vojtechovska, L Dornak, P Kostelnik, L Valek, P Panek
US Patent 8,846,500, 2014
102014
Highly aligned organic semiconductor thin films grown by hot wall epitaxy
A Andreev, H Sitter, R Resel, DM Smilgies, H Hoppe, G Matt, NS Sariciftci, ...
Molecular Crystals and Liquid Crystals 385 (1), 61-70, 2002
102002
Multilayer gettering structure for semiconductor device and method
D Lysacek, M Lorenc, L Valek
US Patent 7,737,004, 2010
82010
Thermal stability of undoped polycrystalline silicon layers on antimony and boron-doped substrates
D Lysáček, L Válek, J Spousta, T Šikola, R Špetík
Thin Solid Films 518 (14), 4052-4057, 2010
72010
Limits of the copper decoration technique for delineating of the V–I boundary
L Válek, Š Stehlík, J Orava, M Ďurík, J Šik, T Wágner
Journal of physics and chemistry of solids 68 (5-6), 1157-1160, 2007
72007
Semiconductor devices and methods of making the same
J Sik, P Kostelník, L Válek, M Lorenc, M Pospìsil, D Lysácek, JM Parsey Jr
US Patent App. 14/200,283, 2014
62014
Enhanced Oxygen Precipitation during the Czochralski Crystal Growth
L Válek, J Šik, D Lysáček
Solid State Phenomena 131, 167-174, 2008
32008
Technologie růstu monokrystalů křemíku Czochralskiho metodou
M Lorenc, J Šik, L Válek
FYZIKÁLNÍ PRINCIPY TECHNOLOGIE VÝROBY POLOVODIČŮ, 15, 0
3
Structural changes of polycrystalline silicon layers during high temperature annealing
D Lysáček, L Válek
On Semiconductor Czech Republic, 0
2
Semiconductor devices and methods of making the same
P Kostelnik, M Lorenc, D Lysá, JM Parsey Jr
US Patent 9,355,965, 2016
12016
Methods of laser marking semiconductor substrates
P Kostelník, M Lorenc, D Lysá, JM Parsey Jr
US Patent 9,099,481, 2015
12015
Růstové defekty v monokrystalech Czochralskiho křemíku
L VÁLEK
Rožnov pod Radhoštěm, 2009
12009
Comparison of gettering capability of various extrinsic techniques and enhancement of gettering ability of polycrystalline silicon layers
D Lysácek, M Lorenc, L Válek
Poster at Joint Fith International Conference on Solid State Crystals and …, 2007
12007
THERMAL STABILITY OF UNDOPED POLYSILICON LAYERS
D Lysáček, L Válek
1
Riddle and Bond Silicon on Insulator (RABSOI)
R Spetik, F Kudrna, L Valek
2017 29th International Symposium on Power Semiconductor Devices and IC's …, 2017
2017
Advanced Silicon Wafer Manufacturing for Sub-Micron Technologies
M Lorenc, M Pospíšil, L Válek, V Englišová, J Šik
Silicon wafer gettering ability
M Durik, L Valek, M Lorenc
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Статьи 1–20