Muthu Manikandan Baskaran
Muthu Manikandan Baskaran
Reservoir Labs Inc.
Verified email at reservoir.com
Title
Cited by
Cited by
Year
Automatic C-to-CUDA code generation for affine programs
MM Baskaran, J Ramanujam, P Sadayappan
International Conference on Compiler Construction, 244-263, 2010
3112010
Automatic transformations for communication-minimized parallelization and locality optimization in the polyhedral model
U Bondhugula, M Baskaran, S Krishnamoorthy, J Ramanujam, A Rountev, ...
International Conference on Compiler Construction, 132-146, 2008
2942008
A compiler framework for optimization of affine loop nests for GPGPUs
MM Baskaran, U Bondhugula, S Krishnamoorthy, J Ramanujam, ...
Proceedings of the 22nd annual international conference on Supercomputing …, 2008
2632008
Effective automatic parallelization of stencil computations
S Krishnamoorthy, M Baskaran, U Bondhugula, J Ramanujam, A Rountev, ...
ACM sigplan notices 42 (6), 235-244, 2007
2622007
Optimizing sparse matrix-vector multiplication on GPUs
MM Baskaran, R Bordawekar
IBM Research Report RC24704, 2009
2322009
Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories
MM Baskaran, U Bondhugula, S Krishnamoorthy, J Ramanujam, ...
Proceedings of the 13th ACM SIGPLAN Symposium on Principles and practice of …, 2008
1582008
Parametric multi-level tiling of imperfectly nested loops
A Hartono, MM Baskaran, C Bastoul, A Cohen, S Krishnamoorthy, ...
Proceedings of the 23rd international conference on Supercomputing, 147-157, 2009
1102009
A mapping path for multi-GPGPU accelerated computers from a portable high level programming abstraction
A Leung, N Vasilache, B Meister, M Baskaran, D Wohlford, C Bastoul, ...
Proceedings of the 3rd Workshop on General-Purpose Computation on Graphics …, 2010
1072010
Parameterized tiling revisited
MM Baskaran, A Hartono, S Tavarageri, T Henretty, J Ramanujam, ...
Proceedings of the 8th annual IEEE/ACM international symposium on Code …, 2010
922010
Optimizing sparse matrix-vector multiplication on GPUs using compile-time and run-time strategies
MM Baskaran, R Bordawekar
IBM Reserach Report, RC24704 (W0812-047), 2008
752008
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
MM Baskaran, N Vydyanathan, UKR Bondhugula, J Ramanujam, ...
ACM sigplan notices 44 (4), 219-228, 2009
742009
Dyntile: Parametric tiled loop generation for parallel execution on multicore processors
A Hartono, MM Baskaran, J Ramanujam, P Sadayappan
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
732010
Efficient and scalable computations with sparse tensors
M Baskaran, B Meister, N Vasilache, R Lethin
2012 IEEE Conference on High Performance Extreme Computing, 1-6, 2012
722012
Optimal loop unrolling for GPGPU programs
GS Murthy, M Ravishankar, MM Baskaran, P Sadayappan
2010 IEEE International Symposium on Parallel & Distributed Processing …, 2010
692010
R-Stream Compiler.
B Meister, N Vasilache, D Wohlford, MM Baskaran, A Leung, R Lethin
Encyclopedia of Parallel Computing, 1756-1765, 2011
622011
Joint scheduling and layout optimization to enable multi-level vectorization
N Vasilache, B Meister, M Baskaran, R Lethin
IMPACT, Paris, France, 2012
472012
Towards effective automatic parallelization for multicore systems
U Bondhugula, M Baskaran, A Hartono, S Krishnamoorthy, J Ramanujam, ...
2008 IEEE International Symposium on Parallel and Distributed Processing, 1-5, 2008
342008
Parametric tiling of affine loop nests
S Tavarageri, A Hartono, M Baskaran, LN Pouchet, J Ramanujam, ...
Proc. 15th Workshop on Compilers for Parallel Computers. Vienna, Austria, 2010
312010
Affine transformations for communication minimal parallelization and locality optimization of arbitrarily nested loop sequences
U Bondhugula, M Baskaran, S Krishnamoorthy, J Ramanujam, A Rountev, ...
Technical Report, 2007
312007
Systems and methods for parallelizing and optimizing sparse tensor computations
MM Baskaran, T Henretty, MH Langston, RA Lethin, BJ Meister, ...
US Patent 9,471,377, 2016
232016
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