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Andrew Lukefahr
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Scalpel: Customizing dnn pruning to the underlying hardware parallelism
J Yu, A Lukefahr, D Palframan, G Dasika, R Das, S Mahlke
ACM SIGARCH Computer Architecture News 45 (2), 548-560, 2017
4562017
Composite cores: Pushing heterogeneity into a core
A Lukefahr, S Padmanabha, R Das, FM Sleiman, R Dreslinski, ...
2012 45th annual IEEE/ACM international symposium on microarchitecture, 317-328, 2012
2162012
Trace based phase prediction for tightly-coupled heterogeneous cores
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013
702013
Heterogeneous microarchitectures trump voltage scaling for low-power cores
A Lukefahr, S Padmanabha, R Das, R Dreslinski Jr, TF Wenisch, ...
Proceedings of the 23rd international conference on Parallel architectures …, 2014
54*2014
FPGA bitstream security: a day in the life
A Duncan, F Rahman, A Lukefahr, F Farahmandi, M Tehranipoor
2019 IEEE International Test Conference (ITC), 1-10, 2019
322019
DynaMOS: Dynamic schedule migration for heterogeneous cores
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 48th International Symposium on Microarchitecture, 322-333, 2015
292015
Systems and devices for formatting neural network parameters
YU Jiecao, A Lukefahr, D Palframan, G Dasika, R Das, S Mahlke
US Patent 11,275,996, 2022
222022
Tf-net: Deploying sub-byte deep neural networks on microcontrollers
J Yu, A Lukefahr, R Das, S Mahlke
ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-21, 2019
192019
Exploring fine-grained heterogeneity with composite cores
A Lukefahr, S Padmanabha, R Das, FM Sleiman, RG Dreslinski, ...
IEEE Transactions on Computers 65 (2), 535-547, 2015
162015
Heterogeneity within a processor core
A Lukefahr, R Das, S Padmanabha, S Mahlke
US Patent 9,639,363, 2017
142017
Mirage cores: The illusion of many out-of-order cores using in-order hardware
S Padmanabha, A Lukefahr, R Das, S Mahlke
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
122017
FLATS: filling logic and testing spatially for FPGA authentication and tamper detection
A Duncan, G Skipper, A Stern, A Nahiyan, F Rahman, A Lukefahr, ...
2019 IEEE international symposium on hardware oriented security and trust …, 2019
92019
SeRFI: secure remote FPGA initialization in an untrusted environment
A Duncan, A Nahiyan, F Rahman, G Skipper, M Swany, A Lukefahr, ...
2020 IEEE 38th VLSI Test Symposium (VTS), 1-6, 2020
72020
Control of switching between executed mechanisms
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 9,870,226, 2018
72018
Recording performance metrics to predict future execution of large instruction sequences on either high or low performance execution circuitry
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 9,965,279, 2018
62018
Recon: From the bitstream to piracy detection
G Skipper, C Sozio, A Duncan, A Lukefahr, M Swany
2020 IEEE Physical Assurance and Inspection of Electronics (PAINE), 1-6, 2020
52020
Systems and devices for compressing neural network parameters
YU Jiecao, A Lukefahr, D Palframan, G Dasika, R Das, S Mahlke
US Patent 11,321,604, 2022
32022
Method of detecting repetition of an out-of-order execution schedule, apparatus and computer-readable medium
S Padmanabha, A Lukefahr, R Das, S Mahlke
US Patent 10,613,866, 2020
22020
BitSET: Bit-Serial Early Termination for Computation Reduction in Convolutional Neural Networks
Y Pan, J Yu, A Lukefahr, R Das, S Mahlke
ACM Transactions on Embedded Computing Systems 22 (5s), 1-24, 2023
12023
MicroBitstreams: Reducing Configuration Time of Encrypted Bitstreams
C Sozio, G Skipper, D Hansen, A Lukefahr, A Duncan
2023 IEEE Physical Assurance and Inspection of Electronics (PAINE), 1-7, 2023
2023
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