| A 68 parallel row access neuromorphic core with 22K multi-level synapses based on logic-compatible embedded flash memory technology M Kim, J Kim, G Park, L Everson, H Kim, S Song, S Lee, CH Kim 2018 IEEE International Electron Devices Meeting (IEDM), 15.4. 1-15.4. 4, 2018 | 25 | 2018 |
| Source driver and display device including the same H Rho, GS Park, SJ Lee, J Park US Patent App. 14/706,134, 2015 | 20 | 2015 |
| A 3D NAND flash ready 8-bit convolutional neural network core demonstrated in a standard logic process M Kim, M Liu, L Everson, G Park, Y Jeon, S Kim, S Lee, S Song, CH Kim 2019 IEEE International Electron Devices Meeting (IEDM), 38.3. 1-38.3. 4, 2019 | 18 | 2019 |
| A 10b linear interpolation DAC using body-transconductance control for AMLCD column driver C Park, KD Kim, SW Lee, GS Park, ST Ryu, GH Cho 2010 IEEE Asian Solid-State Circuits Conference, 1-4, 2010 | 17 | 2010 |
| Power supply apparatuses for preventing latch-up of charge pump and methods thereof SJ Lee, H Lim, HH Rho, GS Park US Patent 8,817,500, 2014 | 11 | 2014 |
| Output buffer circuit controlling slew slope and source driver comprising the same and method of generating the source drive signal thereof GS Park, S Lee, HH Rho, P Junkwan US Patent App. 15/193,314, 2017 | 8 | 2017 |
| An all BTI (N-PBTI, N-NBTI, P-PBTI, P-NBTI) odometer based on a dual power rail ring oscillator array G Park, H Yu, M Kim, CH Kim 2021 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2021 | 6 | 2021 |
| Investigating the Aging Dynamics of Diode-connected MOS Devices using an Array-based Characterization Vehicle in a 65nm Process N Pande, G Park, CH Kim, S Krishnan, V Reddy 2019 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2019 | 5 | 2019 |
| 26.2: Distinguished Student Paper: A 10‐bit Compact Current DAC Architecture for Large‐Size AMOLED Displays KD Kim, SW Lee, GS Park, CB Park, GH Cho, YK Choi, M Lee SID Symposium Digest of Technical Papers 42 (1), 334-337, 2011 | 5 | 2011 |
| A counter based ADC non-linearity measurement circuit and its application to reliability testing G Park, M Kim, N Pande, PW Chiu, J Song, CH Kim 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 4 | 2019 |
| All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits G Park, M Kim, CH Kim, B Kim, V Reddy 2018 IEEE International Reliability Physics Symposium (IRPS), 5C. 2-1-5C. 2-6, 2018 | 3 | 2018 |
| 35.3: A 10‐bit Linear R‐string DAC Architecture for Mobile Full‐HD AMOLED Driver ICs KD Kim, CB Park, SW Lee, GS Park, GH Cho, J Kim, J Kim, YK Choi, ... SID Symposium Digest of Technical Papers 44 (1), 469-472, 2013 | 2 | 2013 |
| Neutron-Induced Pulsewidth Distribution of Logic Gates Characterized Using a Pulse Shrinking Chain-Based Test Structure N Pande, S Kumar, LR Everson, G Park, I Ahmed, CH Kim IEEE Transactions on Nuclear Science 68 (12), 2736-2747, 2021 | 1 | 2021 |
| Extreme temperature characterization of amplifier response up to 300 degrees Celsius using integrated heaters and on-chip samplers H Yu, G Park, CH Kim ESSCIRC 2021-IEEE 47th European Solid State Circuits Conference (ESSCIRC …, 2021 | 1 | 2021 |
| 6.1: A Size Efficient 10b DAC with Multipath Current Interpolation and Weighted Tranconductors for the AMLCD Displays GS Park, SW Lee, KD Kim, CB Park, ST Ryu, GH Cho SID Symposium Digest of Technical Papers 41 (1), 54-57, 2010 | 1 | 2010 |
| Characterization of Analog and Mixed-Signal Circuit Reliability Issues Using On-Chip Monitors G Park University of Minnesota, 2020 | | 2020 |
| Leveraging Circuit Reliability Effects for Designing Robust and Secure Physical Unclonable Functions M Kim, G Park, P Chiu, CH Kim 2019 IEEE International Electron Devices Meeting (IEDM), 13.6. 1-13.6. 4, 2019 | | 2019 |
| P‐38: WITHDRAWN: P‐39: DC‐DC Converters with Controllable Latch‐up Protection Technique for LCD Mobile Display Panels SJ Lee, HH Rho, GS Park, WS Lee, DJ Lee, KJ Kim, JH Kim, HW Cho SID Symposium Digest of Technical Papers 43 (1), 1205-1208, 2012 | | 2012 |
| A Size Efficient 10-bit DAC with Multi-Path Current Interpolation and Weighted Tranconductors for the AMLCDs GH Cho, GS Park, SW Lee, KD Kim, CB Park, ST Ryu SID 10 DIGEST, 54-57, 2010 | | 2010 |
| Design of area-efficient digital-to-analog converter with offset-cancellation for AMLCD displays using multi-path current interpolation GS Park 한국과학기술원, 2010 | | 2010 |
Chris H. KimUniversity of MinnesotaПодтвержден адрес электронной почты в домене umn.edu
