| Robust Boolean reasoning for equivalence checking and functional property verification A Kuehlmann, V Paruthi, F Krohm, MK Ganai IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002 | 441 | 2002 |
| System and method for modeling, abstraction, and analysis of software F Ivancic, PN Ashar, M Ganai, A Gupta, Z Yang US Patent 7,346,486, 2008 | 300 | 2008 |
| Circuit-based Boolean reasoning A Kuehlmann, MK Ganai, V Paruthi Proceedings of the 38th annual Design Automation Conference, 232-237, 2001 | 202 | 2001 |
| Combining strengths of circuit-based and CNF-based algorithms for a high-performance SAT solver MK Ganai, P Ashar, A Gupta, L Zhang, S Malik Proceedings of the 39th annual Design Automation Conference, 747-750, 2002 | 168 | 2002 |
| Efficient SAT-based bounded model checking for software verification F Ivančić, Z Yang, MK Ganai, A Gupta, P Ashar Theoretical Computer Science 404 (3), 256-274, 2008 | 163 | 2008 |
| F-Soft: Software Verification Platform F Ivančić, Z Yang, MK Ganai, A Gupta, I Shlyakhter, P Ashar Computer Aided Verification: 17th International Conference, CAV 2005 …, 2005 | 154 | 2005 |
| Model checking C programs using F-Soft F Ivancic, I Shlyakhter, A Gupta, MK Ganai, V Kahlon, C Wang, Z Yang 2005 International Conference on Computer Design, 297-308, 2005 | 133 | 2005 |
| Symbolic predictive analysis for concurrent programs C Wang, S Kundu, M Ganai, A Gupta International Symposium on Formal Methods, 256-272, 2009 | 111 | 2009 |
| Accelerating high-level bounded model checking MK Ganai, A Gupta Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 107 | 2006 |
| SAT-based scalable formal verification solutions M Ganai, A Gupta Springer Science+ Business Media, 2007 | 106 | 2007 |
| Efficient SAT-based unbounded symbolic model checking using circuit cofactoring MK Ganai, A Gupta, P Ashar IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004 | 100 | 2004 |
| Iterative abstraction using SAT-based BMC with proof analysis A Gupta, M Ganai, Z Yang, P Ashar ICCAD-2003. International Conference on Computer Aided Design (IEEE Cat. No …, 2003 | 99 | 2003 |
| Trace-based symbolic analysis for atomicity violations C Wang, R Limaye, M Ganai, A Gupta International Conference on Tools and Algorithms for the Construction and …, 2010 | 96 | 2010 |
| Enhancing simulation with BDDs and ATPG MK Ganai, A Aziz, A Kuehlmann Proceedings of the 36th Annual ACM/IEEE Design Automation Conference, 385-390, 1999 | 87 | 1999 |
| Learning from BDDs in SAT-based bounded model checking A Gupta, M Ganai, C Wang, Z Yang, P Ashar Proceedings of the 40th annual Design Automation Conference, 824-829, 2003 | 75 | 2003 |
| SAT-based verification methods and applications in hardware verification A Gupta, MK Ganai, C Wang International School on Formal Methods for the Design of Computer …, 2006 | 60 | 2006 |
| Deciding separation logic formulae by SAT and incremental negative cycle elimination C Wang, F Ivančić, M Ganai, A Gupta International Conference on Logic for Programming Artificial Intelligence …, 2005 | 58 | 2005 |
| Integrating ICP and LRA solvers for deciding nonlinear real arithmetic problems S Gao, M Ganai, F Ivančić, A Gupta, S Sankaranarayanan, EM Clarke Formal Methods in Computer Aided Design, 81-89, 2010 | 57 | 2010 |
| Partial order reduction for scalable testing of SystemC TLM designs S Kundu, M Ganai, R Gupta Proceedings of the 45th Annual Design Automation Conference, 936-941, 2008 | 56 | 2008 |
| Efficient modeling of concurrent systems in BMC MK Ganai, A Gupta International SPIN Workshop on Model Checking of Software, 114-133, 2008 | 52 | 2008 |
Franjo IvančićGoogle, Inc.Verified email at google.com
