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Paula Ghedini Der Agopian
Paula Ghedini Der Agopian
São Paulo State University
Подтвержден адрес электронной почты в домене unesp.br
Название
Процитировано
Процитировано
Год
Temperature impact on the tunnel FET off-state current components
PG Der Agopian, MDV Martino, SG dos Santos Filho, JA Martino, ...
Solid-state electronics 78, 141-146, 2012
902012
Low-frequency noise analysis and modeling in vertical tunnel FETs with Ge source
FS Neves, PGD Agopian, JA Martino, B Cretu, R Rooyackers, ...
IEEE Transactions on Electron Devices 63 (4), 1658-1665, 2016
812016
Experimental comparison between trigate p-TFET and p-FinFET analog performance as a function of temperature
PG Der Agopian, JA Martino, R Rooyackers, A Vandooren, E Simoen, ...
IEEE Transactions on Electron Devices 60 (8), 2493-2497, 2013
812013
InGaAs tunnel FET with sub-nanometer EOT and sub-60 mV/dec sub-threshold swing at room temperature
A Alian, Y Mols, CCM Bordallo, D Verreck, A Verhulst, A Vandooren, ...
Applied Physics Letters 109 (24), 2016
662016
Study of line-TFET analog performance comparing with other TFET and MOSFET architectures
PG Der Agopian, JA Martino, A Vandooren, R Rooyackers, E Simoen, ...
Solid-State Electronics 128, 43-47, 2017
422017
Influence of the source composition on the analog performance parameters of vertical nanowire-TFETs
PGD Agopian, MDV Martino, SD dos Santos, FS Neves, JA Martino, ...
IEEE Transactions on Electron Devices 62 (1), 16-22, 2014
412014
Threshold voltage extraction in Tunnel FETs
A Ortiz-Conde, FJ García-Sánchez, J Muci, A Sucre-González, JA Martino, ...
Solid-State Electronics 93, 49-55, 2014
402014
Analog figures of merit of vertically stacked silicon nanosheets nMOSFETs with two different metal gates for the sub-7 nm technology node operating at high temperatures
VCP Silva, WF Perina, JA Martino, E Simoen, A Veloso, PGD Agopian
IEEE Transactions on Electron Devices 68 (7), 3630-3635, 2021
252021
Influence of 60-MeV proton-irradiation on standard and strained n-and p-channel MuGFETs
PGD Agopian, JA Martino, D Kobayashi, E Simoen, C Claeys
IEEE Transactions on Nuclear Science 59 (4), 707-713, 2012
242012
Analog performance of vertical nanowire TFETs as a function of temperature and transport mechanism
MDV Martino, F Neves, PG Der Agopian, JA Martino, A Vandooren, ...
Solid-State Electronics 112, 51-55, 2015
232015
Drain induced barrier thinning on TFETs with different source/drain engineering
MDV Martino, JA Martino, PGD Agopian
2014 29th Symposium on Microelectronics Technology and Devices (SBMicro), 1-4, 2014
232014
Back gate bias influence on SOI Ω-gate nanowire down to 10 nm width
LM Almeida, PGD Agopian, JA Martino, S Barraud, M Vinet, O Faynot
2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference …, 2016
162016
Analog design with Line-TFET device experimental data: from device to circuit level
W Gonçalez Filho, E Simoen, R Rooyackers, C Claeys, N Collaert, ...
Semiconductor Science and Technology 35 (5), 055025, 2020
152020
Intrinsic voltage gain of Line-TFETs and comparison with other TFET and MOSFET architectures
PGD Agopian, JA Martino, R Rooyackers, A Vandooren, E Simoen, ...
2016 Joint International EUROSOI Workshop and International Conference on …, 2016
152016
Double gate tunnel-FET working like a permittivity based biosensor with different drain to gate and drain to biomaterial alignments
CN Macambira, PGD Agopian, JA Martino
ECS Journal of Solid State Science and Technology 8 (3), Q50, 2019
142019
Zero temperature coefficient behavior for advanced MOSFETs
J Martino, V Mesquita, C Macambira, V Itocazu, L Almeida, P Agopian, ...
2016 13th IEEE International Conference on Solid-State and Integrated …, 2016
142016
Study of the linear kink effect in PD SOI nMOSFETs
PG Der Agopian, JA Martino, E Simoen, C Claeys
Microelectronics journal 38 (1), 114-119, 2007
142007
Performance evaluation of Tunnel-FET basic amplifier circuits
RS Rangel, PGD Agopian, JA Martino
2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS), 21-24, 2019
132019
Impact of the NW-TFET diameter on the efficiency and the intrinsic voltage gain from a conduction regime perspective
CCM Bordallo, VB Sivieri, JA Martino, PGD Agopian, R Rooyackers, ...
IEEE Transactions on Electron Devices 63 (7), 2930-2935, 2016
132016
Performance of TFET and FinFET devices applied to current mirrors for different dimensions and temperatures
MDV Martino, JA Martino, PGD Agopian, A Vandooren, R Rooyackers, ...
Semiconductor Science and Technology 31 (5), 055001, 2016
132016
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